US2005006777A1PendingUtilityA1
Structure comprising an interlayer of palladium and/or platinum and method for fabrication thereof
Est. expiryAug 9, 2022(expired)· nominal 20-yr term from priority
H10P 14/432H10P 14/47H10P 14/46H10W 20/0425H10W 20/425H10W 20/044H10W 20/043H10W 20/033Y10T428/24917Y10T428/24322
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Claims
Abstract
An interconnection structure comprising a substrate having a dielectric layer with a via opening therein; a barrier layer located in the via opening; an interlayer of palladium and/or platinum on the barrier layer; and a layer of copper or copper alloy on the interlayer is provided.
Claims
exact text as granted — not AI-modified1 . An electronic structure comprising:
a substrate having a dielectric layer having a via opening therein; the via opening having sidewalls and bottom surfaces of the via opening; an interlayer of a member selected from the group consisting of palladium, platinum and mixtures thereof; and copper or copper alloy located on the interlayer.
2 . The electronic structure of claim 1 wherein said interlayer is palladium.
3 . The electronic structure of claim 1 wherein said interlayer is platinum.
4 . The electronic structure of claim 1 wherein the interlayer is about 50 to about 500 Angstroms thick.
5 . The electronic structure of claim 1 wherein the interlayer is about 50 to about 100 Angstroms thick.
6 . The structure of claim 1 wherein the dielectric layer comprises silicon dioxide.
7 . The structure of claim 1 wherein the via opening is about 100 to about 500 nanometers thick.
8 . The structure of claim 1 wherein the barrier layer is about 5 to about 200 nanometers thick.
9 . The structure of claim 1 wherein the barrier layer is selected from the group consisting of tungsten, alloys of tungsten, titanium, alloys of titanium, titanium nitride, tantalum, tantalum nitride and tantalum silicon nitride.
10 . The structure of claim 1 which further comprises a copper seed layer on said interlayer intermediate said copper or copper alloy.
11 - 26 . (canceled)
27 . A structure obtained by a method which comprises forming an insulating material on a substrate; lithographically defining and forming recesses for lines and/or via in the insulating material in which interconnection conductor material will be deposited:
depositing in the recesses a barrier layer; depositing an interlayer of a member selected from the group consisting of palladium, platinum, and mixtures thereof, and depositing copper or a copper alloy on the interlayer to fill the recesses.Join the waitlist — get patent alerts
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