US2005003652A1PendingUtilityA1

Method and apparatus for low temperature copper to copper bonding

Priority: Jul 2, 2003Filed: Dec 24, 2003Published: Jan 6, 2005
Est. expiryJul 2, 2023(expired)· nominal 20-yr term from priority
H10W 99/00H10W 90/722H10W 90/00H10W 72/012H10W 72/07336H10W 72/07236H10W 80/301H10W 72/07231H10W 72/252H10W 72/251H10W 72/20
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Claims

Abstract

A method comprising: coating a conductive bump on a first substrate with a conductive material to form a coated conductive bump; coating a conductive bump on a second substrate with a conductive material to form a coated conductive bump; and bonding the coated conductive bump on the first substrate to the coated conductive bump on the second substrate to electrically connect the first substrate to the second substrate.

Claims

exact text as granted — not AI-modified
1 . A method comprising: 
 coating a conductive bump on a first substrate with a conductive material to form a coated conductive bump;    coating a conductive bump on a second substrate with a conductive material to form a coated conductive bump; and    bonding the coated conductive bump on the first substrate to the coated conductive bump on the second substrate to electrically connect the first substrate to the second substrate.    
   
   
       2 . The method of  claim 1 , wherein the conductive bumps are comprised of copper.  
   
   
       3 . The method of  claim 1 , wherein the conductive material comprises a noble metal.  
   
   
       4 . The method of  claim 3 , wherein the noble metal comprises silver.  
   
   
       5 . The method of  claim 3 , wherein bonding occurs at a temperature lower than 300° C.  
   
   
       6 . The method of  claim 5 , wherein the first substrate is a semiconductor die substrate and the second substrate is a package substrate.  
   
   
       7 . The method of  claim 5 , wherein the first substrate and the second substrate are semiconductor substrates.  
   
   
       8 . A method comprising: 
 forming a layer of a conductive material on a first set of copper bumps provided on a first substrate to form a first set of coated copper bumps;    forming a layer of a conductive material on a second set of copper bumps provided on a second substrate to form a second set of coated copper bumps; and    bonding the first set of coated copper bumps to the second set of coated copper bumps.    
   
   
       9 . The method of  claim 8 , wherein the first substrate is a semiconductor die substrate and the second substrate is a package substrate.  
   
   
       10 . The method of  claim 8 , wherein the first and second substrates are semiconductor substrates.  
   
   
       11 . The method of  claim 8 , wherein the conductive material comprises a noble metal.  
   
   
       12 . The method of  claim 8 , wherein the noble metal comprises silver.  
   
   
       13 . The method of  claim 12 , wherein the layer of silver is formed by displacement deposition.  
   
   
       14 . The method of  claim 12 , wherein the layer of silver is formed by one of: sputtering, electro-beam evaporation from a silver target, chemical vapor deposition, atomic layer deposition followed by an etch-back.  
   
   
       15 . The method of  claim 8 , wherein bonding occurs at a temperature lower than 300° C.  
   
   
       16 . The method of  claim 8 , further comprising cleaning the surface of the copper bumps before forming a layer of a noble metal on the copper bumps.  
   
   
       17 . The method of  claim 16 , further comprising aligning the first set of copper bumps on the first substrate with the second set of copper bumps on the second substrate before bonding.  
   
   
       18 . The method of  claim 16 , wherein the surface of the copper bumps is cleaned using one of an acid etch, exposure to methanol vapor, or a gas anneal to remove any native oxide.  
   
   
       19 . A method comprising: 
 cleaning a first set of copper bumps provided on a first substrate;    cleaning a second set of copper bumps provided on a second substrate;    forming a layer of silver on a first set of copper bumps provided on a first substrate to form a first set of coated copper bumps;    forming a layer of silver on a second set of copper bumps provided on a second substrate to form a second set of coated copper bumps;    aligning the first set of coated copper bumps on the first substrate with the second set of coated copper bumps on the second substrate; and    bonding the first set of coated copper bumps to the second set of coated copper bumps at a temperature of less than 300° C.    
   
   
       20 . The method of  claim 19 , wherein the surface of the copper bumps is cleaned using one of an acid etch, exposure to methanol vapor, or a gas anneal to remove any native oxide.  
   
   
       21 . The method of  claim 19 , wherein the layer of silver is formed by displacement deposition.  
   
   
       22 . The method of  claim 19 , wherein the layer of silver is formed by one of: sputtering, electro-beam evaporation from a silver target, chemical vapor deposition, atomic layer deposition followed by an etch-back.  
   
   
       23 . The method of  claim 19 , wherein the first substrate is a semiconductor die substrate and the second substrate is a package substrate.  
   
   
       24 . The method of  claim 19 , wherein the first and second substrates are semiconductor substrates.  
   
   
       25 . A device comprising: 
 two stacked substrates; and    a plurality of conductive bumps provided on each substrate, wherein each of the plurality of conductive bumps is coated with a conductive material and opposing coated conductive bumps are bonded to one another to electrically connect the two stacked substrates.    
   
   
       26 . The device of  claim 25 , wherein each of the plurality of conductive bumps is comprised of copper.  
   
   
       27 . The device of  claim 25 , wherein the conductive material comprises a noble metal.  
   
   
       28 . The device of  claim 27 , wherein the noble metal comprises silver.  
   
   
       29 . The device of  claim 28 , wherein the two stacked substrates comprise a semiconductor die substrate and a package substrate.  
   
   
       30 . The device of  claim 28 , wherein the two stacked substrates comprise semiconductor substrates.

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