Sampling-error phase compensating apparatus and method thereof

Abstract

A sampling-error phase compensating device and a method thereof for sequentially sampling data signals and outputting sampled data signals. The method sequentially includes the steps of: sampling each data signal according to a first sampling clock signal, and sequentially outputting corresponding phase detection signals according to the sampled data signals; sequentially outputting phase regulating signals, which correspond to the phase detection signals, respectively, according to the phase detection signals, wherein when the phase detection signals are the same, the phase regulating signals includes first-state phase regulating signals and second-state phase regulating signals, the first-state phase regulating signals correspond to the phase detection signals, and the number of the second-state phase regulating signals is smaller than that of the first-state phase regulating signals; and sequentially outputting second sampling clock signals according to the phase regulating signals, wherein phases of the sampling clock signals correspond to those of the phase regulating signals, respectively.

What is claimed is:  
     
         1 . A method for compensating a sampling phase error of a plurality of 
 data signals, the method comprising the steps of:    sampling a plurality of data signals according to a sampling clock signal;    outputting a plurality of phase detection signals according to a phase state of the sampled data signals;    outputting a plurality of first phase regulating signal according to the phase detection signals; and    outputting at least one second phase regulating signal different from the first phase regulating signal when a number of the phase detection signals represent the same phase state of the sampled data signals, wherein when a number of the phase detection signals represent a phase leading state, the first phase regulating signals include phase backward regulating signals and the at least one second phase regulating signal includes a phase non-backward regulating signal, and when a number of the phase detection signals represent a phase lagging state, the first phase regulating signals include phase forward regulating signals and the at least one second phase regulating signal includes a phase non-forward regulating signal;    adjusting the sampling clock signals according to the first phase regulating signals or the at least one second phase regulating signal.    
     
     
         2 . The method according to  claim 1 , wherein the at least one phase non-forward regulating signals may be either a phase backward regulating signal or a hold signal, and the at least one second phase non-backward regulating signal may be either a phase forward regulating signal or a hold signal.  
     
     
         3 . The method according to  claim 1 , wherein the method further 
 comprises:    outputting at least one third phase regulating signal when the absolute value of at least one of the phase detection signals is larger than a first threshold value, wherein when the phase detection signals represent a phase leading state, the at least one third phase regulating signal include a phase backward regulating signal and when the phase detection signals represent a phase lagging state, the at least one third phase regulating signal include a phase forward regulating signal; and    adjusting the sampling clock signals according to the at least one third phase regulating signal.    
     
     
         4 . The method according to  claim 1 , wherein the method further 
 comprises:    outputting a forth phase regulating signal, wherein when the sum of the first and the at least one second phase regulating signals representing phase forward regulating signals minus the sum of the first and the at least one second phase regulating signals representing phase backward regulating signals is larger than a second threshold value, the forth phase regulating signal is a phase backward regulating signal, and when the sum of the first and the at least one second phase regulating signals representing phase backward regulating signals minus the sum of the first and the at least one second phase regulating signals representing phase forward regulating signals is larger than a second threshold value, the forth phase regulating signal is a phase forward regulating signal; and    adjusting the sampling clock signals according to the forth phase regulating signal.    
     
     
         5 . An apparatus for compensating a sampling phase error of a plurality of 
 data signals, the method comprising the steps of:    a sampling unit for sampling a plurality of data signals according to a sampling clock signal;    a phase detector for outputting a plurality of phase detection signals according to a phase state of the sampled data signals;    a first phase regulating unit coupled to the phase detector for outputting a plurality of first phase regulating signal according to the phase detection signals and outputting at least one second phase regulating signal different from the first phase regulating signal when a number of the phase detection signals represent the same phase state of the sampled data signals, wherein when a number of the phase detection signals represent a phase leading state, the first phase regulating signals include phase backward regulating signals and the at least one second phase regulating signal includes a phase non-backward regulating signal, and when a number of the phase detection signals represent a phase lagging state, the first phase regulating signals include phase forward regulating signals and the at least one second phase regulating signal includes a phase non-forward regulating signal; and    a phase adjusting unit for adjusting the sampling clock signals according to the first phase regulating signals or the at least one second phase regulating signal.    
     
     
         6 . The apparatus according to  claim 5 , wherein the at least one phase non-forward regulating signals may be either a phase backward regulating signal or a hold signal, and the at least one second phase non-backward regulating signal may be either a phase forward regulating signal or a hold signal.  
     
     
         7 . The apparatus according to  claim 5 , wherein the apparatus further comprises a second phase regulating unit coupled to the phase detector for outputting at least one third phase regulating signal when the absolute value of at least one of the phase detection signals is larger than a first threshold value, wherein when the phase detection signals represent a phase leading state, the at least one third phase regulating signal include a phase backward regulating signal and when the phase detection signals represent a phase lagging state, the at least one third phase regulating signal include a phase forward regulating signal; 
 wherein the phase adjusting unit coupled to the first and the second phase regulating units for adjusting the sampling clock signals according to either the first phase regulating signals or the at least one second phase regulating signal or the at least one third phase regulating signal.    
     
     
         8 . The apparatus according to  claim 5 , wherein the apparatus further 
 comprises:    a third phase regulating unit coupled to the second phase regulating unit for outputting a forth phase regulating signal, wherein when the sum of the first and the at least one second phase regulating signals representing phase forward regulating signals minus the sum of the first and the at least one second phase regulating signals representing phase backward regulating signals is larger than a second threshold value, the forth phase regulating signal is a phase backward regulating signal, and when the sum of the first and the at least one second phase regulating signals representing phase backward regulating signals minus the sum of the first and the at least one second phase regulating signals representing phase forward regulating signals is larger than a second threshold value, the forth phase regulating signal is a phase forward regulating signal;    wherein the phase adjusting unit coupled to the first and the third phase regulating units for adjusting the sampling clock signals according to either the first phase regulating signals or the at least one second phase regulating signal or the at least one forth phase regulating signal.