Composite low-k dielectric structure

Abstract

A method of forming a composite intermetal dielectric structure is provided. An initial intermetal dielectric structure is provided, which includes a first dielectric layer and two conducting lines. The two conducting lines are located in the first dielectric layer. A portion of the first dielectric layer is removed between the conducting lines to form a trench. The trench is filled with a second dielectric material. The second dielectric material is a low-k dielectric having a dielectric constant less than that of the first dielectric layer.

1 . A method of forming a composite intermetal dielectric structure, comprising: 
 providing an initial intermetal dielectric structure comprising a first dielectric layer and two conducting lines, wherein the two conducting lines are located in the first dielectric layer;    forming a nonconductive patterned trench mask over the initial intermetal dielectric structure;    removing a portion of the first dielectric layer between the conducting lines to form a trench in alignment with the trench mask; and    filling the trench with a second dielectric material, wherein the second dielectric material is a low-k dielectric having a dielectric constant less than that of the first dielectric layer.    
     
     
         2 . The method of  claim 1 , wherein the initial intermetal dielectric structure further comprises a liner layer formed between each of the conducting lines and the first dielectric layer, and wherein the trench is formed between the liner layers of the conducting lines.  
     
     
         3 . The method of  claim 2 , wherein the providing of the initial intermetal dielectric structure comprises: 
 depositing the liner layer, wherein the second dielectric material is not compatible with the liner layer deposition.    
     
     
         4 . The method of  claim 1 , wherein the removing of the first dielectric layer portion includes removing a portion of the trench mask to form the trench.  
     
     
         5 . The method of  claim 4 , wherein the forming of the patterned trench mask comprises: 
 depositing the trench mask, wherein the second dielectric material is not compatible with the trench mask deposition.    
     
     
         6 . The method of  claim 1 , further comprising: 
 forming a cap layer over the second dielectric material.    
     
     
         7 . The method of  claim 1 , further comprising: 
 etching the second dielectric material so that it is recessed relative to the conducting lines;    forming a cap layer over the second dielectric material; and    planarizing the cap layer to be substantially coplanar with the conducting lines.    
     
     
         8 . The method of  claim 1 , wherein the first dielectric layer is made from a low-k dielectric material.  
     
     
         9 . The method of  claim 1 , further comprising: 
 forming a cap layer over the composite intermetal dielectric structure.    
     
     
         10 . The method of  claim 1 , wherein the providing of the initial intermetal dielectric structure comprises: 
 depositing conductive material to form the conducting lines, wherein the second dielectric material is not compatible with the conductive material deposition.    
     
     
         11 . The method of  claim 1 , wherein the providing of the initial intermetal dielectric structure comprises: 
 performing a planarizing process on the conducting lines, wherein the second dielectric material is not compatible with the planarizing process for the conducting lines.    
     
     
         12 . The method of  claim 1 , wherein the second dielectric material is porous.  
     
     
         13 . The method of  claim 1 , wherein the first dielectric layer is made from a material having a mechanical strength greater than that of the second dielectric material.  
     
     
         14 . A method of fabricating a semiconductor device, comprising: 
 forming a first dielectric layer;    forming openings in the first dielectric layer using a damascene process;    filling the openings with conductive material to form conducting lines and/or vias;    performing a chemical mechanical polish to remove excess conductive material and to provide a substantially planar upper surface;    forming a nonconductive patterned trench mask;    patterning and etching away select portions of the first dielectric layer between at least two conducting lines to form trenches in alignment with the trench mask; and    depositing a second dielectric material in the trenches, wherein the second dielectric material is a low-k dielectric material having a dielectric constant value less than that of the first dielectric layer.    
     
     
         15 . The method of  claim 14 , wherein the conductive material comprises copper.  
     
     
         16 . The method of  claim 14 , wherein the first dielectric layer is a low-k dielectric material.  
     
     
         17 .- 19 . Cancelled  
     
     
         20 . A method of fabricating a semiconductor device, comprising: 
 providing an initial intermetal dielectric structure comprising a layer of a first dielectric material and a conducting line, wherein the conducting line is located at least partially in the first dielectric material;    forming a nonconductive patterned trench mask over the initial intermetal dielectric structure;    removing a portion of the first dielectric material adjacent the conducting line to form a trench in the layer, the trench being in alignment with the trench mask; and    filling the trench with a second dielectric material, wherein the second dielectric material is a low-k dielectric having a dielectric constant less than that of the first dielectric material, and such that the second dielectric material is located between the conducting line and the first dielectric material.    
     
     
         21 . The method of  claim 20 , wherein the removing of the first dielectric material portion includes removing a portion of the trench mask.  
     
     
         22 . The method of  claim 20 , further comprising: 
 forming a cap layer over the second dielectric material.    
     
     
         23 . The method of  claim 20 , wherein the first dielectric material is a low-k dielectric material.  
     
     
         24 . The method of  claim 20 , wherein the first dielectric material has a mechanical strength greater than that of the second dielectric material.  
     
     
         25 . A semiconductor device comprising: 
 a first level portion of an intermetal dielectric structure comprising 
 a conducting line comprising a conductive material;  
 a first dielectric material; and  
 a second dielectric material located between the conducting line and the first dielectric material, wherein the second dielectric material is a low-k dielectric material having a dielectric constant value less than that of the first dielectric material.  
   
     
     
         26 . The semiconductor device of  claim 25 , wherein the first dielectric material is a low-k dielectric material.  
     
     
         27 . The semiconductor device of  claim 25 , wherein the first dielectric material has a mechanical strength greater than that of the second dielectric material.