Switched capacitor circuit capable of minimizing clock feedthrough effect in a voltage controlled oscillator circuit

Abstract

A switched capacitor circuit for use in a voltage controlled oscillator (VCO) capable of minimizing clock feedthrough effect and an undesired momentary frequency drift in the VCO output frequency when the switched capacitor circuit is shut off. By gradually switching the switched capacitor circuit from an on state to an off state the clock feedthrough effect can be minimized. Several differently sized switch elements are used to selectively switch the capacitor from an internal capacitive node to ground. When switching the switched capacitor circuit to an off state, the control signals are sequenced to shut the switch elements off in order based on decreasing switch size. The smallest switch element can have a low-pass filter added to its control terminal to further decrease the clock feedthrough effect.

1 . A switched capacitor circuit capable of minimizing clock feedthrough effect, comprising: 
 a positive side switch element for selectively connecting a positive side first node to a positive side second node depending upon a signal applied to a first control terminal of the positive side switch element, wherein the positive side first node is connected to a positive side capacitor; and    a low-pass filter having an input terminal connected to a control signal and an output terminal connected to the first control terminal of the positive side switch element for making the positive side switch element gradually switch of, wherein the control signal is substantially a two-level signal with a first level for switching off the switched capacitor circuit and a second level for switching on the switched capacitor circuit.    
     
     
         2 . The switched capacitor circuit of  claim 1 , wherein the positive side second node is ground and the positive side switch element is an NMOS transistor.  
     
     
         3 . The switched capacitor circuit of  claim 1 , further comprising: 
 a negative side switch element of substantially the same size as the positive side switch element for selectively connecting a negative side first node to a negative side second node depending upon the control signal applied to the first control terminal of the positive side switch element, wherein the negative side first node is connected to a negative side capacitor.    
     
     
         4 . The switched capacitor circuit of  claim 3 , further comprising: 
 a center switch element having a first terminal connected to the positive side first node, a second terminal connected to the negative side first node, and a third control terminal connected to the control signal.    
     
     
         5 . The switched capacitor circuit of  claim 4 , wherein the positive side second node is ground, the negative side second node is ground, and the positive side switch element, the negative side switch element, and the center switch element are NMOS transistors.  
     
     
         6 - 24 . (cancelled)