Transmitter circuit, transmission circuit and driver unit

Abstract

A transmitter circuit for use in a display device of the type having a transmission line consisting of aluminum or copper conductor formed on a glass substrate includes a driver circuit, which has a non-inverting output terminal and an inverting output terminal, for outputting a signal current, which has a loop direction that changes based upon an input signal, to the non-inverting and inverting output terminals; and an output-waveform control circuit for detecting the edge of the waveform of the input signal and responding by increasing the signal current temporarily.

What is claimed is:  
     
         1 . A transmitter circuit comprising: 
 a driver circuit having a non-inverting output terminal and an inverting output terminal for outputting a signal current, which has a loop direction that changes based upon an input signal, to the non-inverting output terminal and inverting output terminal; and    an output-waveform control circuit for detecting a waveform edge of the input signal and responding by increasing the signal current temporarily.    
     
     
         2 . The transmitter circuit according to  claim 1 , wherein said output-waveform control circuit includes: 
 an edge detecting circuit receiving the input signal and outputting a detection signal when the edge of the input signal is detected;    switch means controlled to be turned on by the detection signal; and    a current source for supplying a current, which is added to the signal current, when said switch means has been turned on.    
     
     
         3 . The transmitter circuit according to  claim 1 , wherein said output-waveform control circuit includes: 
 a first inverter circuit receiving a non-inverted input signal;    a first capacitor having one end connected to an output terminal of said first inverter circuit and another end connected to the inverting output terminal;    a second inverter circuit receiving an inverted input signal; and    a second capacitor having one end connected to an output terminal of the second inverter circuit and another end connected to the non-inverting output terminal.    
     
     
         4 . The transmitter circuit according to  claim 1 , wherein said driver circuit includes: 
 a non-inverting output terminal and an inverting output terminal;    a first transistor for receiving a non-inverted input signal and switching in response to pass a current from a high-potential power supply to the non-inverting output terminal;    a second transistor for receiving an inverted input signal and switching in response to pass a current from the non-inverting output terminal to the low-potential power supply;    a third transistor for receiving the inverted input signal, and switching in response to pass a current from the high-potential power supply to the inverting output terminal; and    a fourth transistor for receiving the non-inverted input signal and switching on in response to pass a current from the inverting output terminal to a low-potential power supply.    
     
     
         5 . A transmitter circuit comprising: 
 a driver circuit, which has a non-inverting output terminal and an inverting output terminal, for outputting a differential voltage, whose polarity changes based upon an input signal, to the non-inverting output terminal and inverting output terminal; and    an output-waveform control circuit for detecting a waveform edge of the input signal and responding by increasing the differential voltage temporarily.    
     
     
         6 . The transmitter circuit according to  claim 5 , wherein said output-waveform control circuit includes: 
 an edge detecting circuit for outputting a first detection signal when a rising edge of the waveform is detected and a second detection signal when a falling edge of the waveform is detected;    a first switch circuit for pulling up the non-inverting output terminal in response to the first detection signal;    a second switch circuit for pulling down the inverting output terminal in response to the first detection signal;    a third switch circuit for pulling down the non-inverting output terminal in response to the second detection signal; and    a fourth switch circuit for pulling up the inverting output terminal in response to the second detection signal.    
     
     
         7 . The transmitter circuit according to  claim 5 , wherein said driver circuit includes: 
 a potential dividing circuit for generating high- and low-level potential-divided voltages;    a first switch circuit for selecting the potential-divided voltage based upon a non-inverted input signal and outputting the voltage to the non-inverting output terminal; and    a second switch circuit for selecting the potential-divided voltage based upon the non-inverted input signal and outputting the voltage to the inverting output terminal.    
     
     
         8 . A transmission circuit comprising: 
 the transmitter circuit as set forth in  claim 1;     a transmission line having one end connected to the non-inverting output terminal and inverting output terminal of said transmitter circuit; and    a receiver circuit connected to the other end of said transmission line.    
     
     
         9 . A driver unit comprising: 
 a shift register circuit receiving grayscale data for driving data lines of a matrix display panel; and    the transmitter circuit as set forth in  claim 1 , connected to a serial output end of said shift register circuit.    
     
     
         10 . The driver unit according to  claim 9 , further comprising the transmission line having one end connected to the non-inverting output terminal and inverting output terminal of said transmitter circuit.  
     
     
         11 . The driver unit according to  claim 10 , wherein said transmission line comprises a conductor on a glass substrate of the matrix display panel.  
     
     
         12 . A transmission circuit comprising: 
 the transmitter circuit as set forth in  claim 5;     a transmission line having one end connected to the non-inverting output terminal and inverting output terminal of said transmitter circuit; and    a receiver circuit connected to the other end of said transmission line.    
     
     
         13 . A driver unit comprising: 
 a shift register circuit receiving grayscale data for driving data lines of a matrix display panel; and    the transmitter circuit as set forth in  claim 5 , connected to a serial output end of said shift register circuit.    
     
     
         14 . The driver unit according to  claim 13 , further comprising the transmission line having one end connected to the non-inverting output terminal and inverting output terminal of said transmitter circuit.  
     
     
         15 . The driver unit according to  claim 14 , wherein said transmission line comprises a conductor on a glass substrate of the matrix display panel.  
     
     
         16 . A transmitter circuit comprising: 
 a driver circuit including an input terminal for receiving an input signal; a pair of differential output terminals for outputting a differential output signal; and first and second current sources for supplying source and sink currents; said driver circuit responsive to the input signal received at the input terminal performing control so that charging drive of one of said differential output terminals with the source current and discharging drive of the other of said differential output terminals with the sink current are performed;    an edge detection circuit receiving the input signal and detecting a transition of the input signal to output a detection signal which is set in an active state for a preset period; and    third and fourth current sources, both receiving the detection signal from the edge detection circuit and controlled to be set into an active state when the detection signal is set in an active state to provide respective currents which are summed to said source/sink currents from said first and second currents sources; said third and forth current sources being controlled to be in an inactive state when the detection signal is set in an inactive state.    
     
     
         17 . A transmitter circuit comprising: 
 a driver circuit having an input terminal for receiving an input signal and a pair of differential output terminals for outputting a differential output signal and controlling, responsive to the input signal received at the input terminal, so as to perform charging drive of one of said differential output terminals and discharging drive of the other of said differential output terminals; and    first and second differentiators receiving the input signal and a complementary signal of the input signal respectively and having respective outputs connected to said differential output terminals; wherein when the input signal undergoes a transition, the differential output signal from said differential output terminals has a waveform having an amplitude thereof increased temporally by the outputs from said first and second differentiators.    
     
     
         18 . A transmitter circuit comprising: 
 a driver circuit including:    an input terminal for receiving an input signal;    a pair of differential output terminals for outputting a differential output signal;    a first voltage divider circuit including a plurality of resistors serially connected across first and second power supplies and outputting first and second voltages from first and second connection nodes of said resistors;    a first selector circuit receiving respective voltages from said first and second connection nodes of said first voltage divider circuit and selecting one of the received two voltages based on the input signal received at the input terminal to supply so selected voltage to a first terminal constituting said differential output terminals;    a second voltage divider circuit including a plurality of resistors serially connected across said first and second power supplies and outputting first and second voltages from first and second connection nodes of said resistors; and    a second selector circuit receiving respective voltages from said first and second connection nodes of said second voltage divider circuit and selecting one of the received two voltages, which is complementary to the voltage supplied to the first terminal of said differential output terminals, based on said input signal to supply so selected voltage to a second terminal constituting said differential output terminals;    an edge detection circuit receiving the input signal and detecting rise and fall transitions of the input signal to output respectively first and second detection signals which are set in an active state for a preset period; and    a control circuit having two outputs respectively connected to said differential output terminals, receiving said first and second detection signals from the edge detection circuit and performing control so that charging drive of the first terminal of said differential output terminals and discharging drive of the second terminal of said differential output terminals are performed concurrently when the first detection signal is in an active state, while charging drive of the second terminal of said differential output terminals and discharging drive of the first terminal of said differential output terminals are performed concurrently when the second detection signal is in an active state.    
     
     
         19 . A transmitter circuit comprising: 
 a driver circuit including:    an input terminal for receiving an input signal;    a pair of differential output terminals for outputting a differential output signal;    a first voltage divider circuit including a plurality of resistors serially connected across first and second power supplies and outputting first and second voltages from first and second connection nodes of said resistors;    a first selector circuit receiving respective voltages from said first and second connection nodes of said first voltage divider circuit and selecting one of the received two voltages based on the input signal received at the input terminal to supply so selected voltage to a first terminal constituting said differential output terminals;    a second voltage divider circuit including a plurality of resistors serially connected across said first and second power supplies and outputting first and second voltages from first and second connection nodes of said resistors; and    a second selector circuit receiving respective voltages from said first and second connection nodes of said second voltage divider circuit and selecting one of the received two voltages, which is complementary to the voltage supplied to the first terminal of said differential output terminals, based on said input signal to supply so selected voltage to a second terminal constituting said differential output terminals; and    first and second differentiators receiving said input signal and a complementary signal of said input signal respectively and having respective outputs connected to said differential output terminals; wherein when the input signal undergoes a transition, the differential output signal from said differential output terminals has a waveform having an amplitude thereof increased temporally by the outputs from said first and second differentiators.    
     
     
         20 . The transmitter circuit according to  claim 16 , wherein said driver circuit includes: 
 a first series circuit comprising first and second transistors serially connected across said first current source and said second current source; said first and second transistors having control terminals for receiving the input signal and an inverted signal obtained by inverting the input signal respectively with a connection node of said first and second transistors being connected to a first terminal constituting said differential output terminals; and    a second series circuit comprising third and fourth transistors serially connected in parallel with said first series circuit across said first current source and said second current source; said third and fourth transistors having control terminals for receiving the inverted signal and the input signal respectively with a connection node of said third and fourth transistors being connected to a second terminal constituting said differential output terminals.