Frequency bounded oscillator for video reconstruction

Abstract

A frequency range bounder for limiting the frequency of a voltage controlled oscillator uses a multiplexer that responds to comparator inputs indicating whether an input control signal will allow the oscillator frequency to go beyond a predetermined range. If the control signal keeps the frequency within the range, the control signal is sent directly to an oscillator driver. If the control signal is above or below the range, the multiplexer outputs an alternative value as the control signal. As a result, the oscillator frequency is prevented from extending beyond an allowable tolerance range.

1 - 25 . (cancelled)  
     
     
         26 . An apparatus for outputting a clock signal for video reconstruction in a terminal, comprising: 
 an oscillator that generates the clock signal;    a control logic circuit with a phase locked loop for receiving an incoming video signal and phase locking to a clock signal portion of the incoming video signal, wherein the control logic circuit outputs a control signal for controlling an output of the oscillator based on the phase lock; and    a frequency range bounder in the phase locked loop that receives the control signal and outputs a bounded control signal that bounds the frequency of the oscillator to a selected range, said range being defined by an upper value and a lower value, said lower value being different from said upper value;    wherein the incoming video signal is a digital signal and the clock signal portion of the incoming video signal is program clock reference data for the digital signal.    
     
     
         27 . The apparatus of  claim 26 , wherein the frequency range bounder includes an output multiplexer and a threshold register that stores at least one threshold value and that is coupled to the output multiplexer, wherein the output multiplexer receives a control signal and outputs one of the control signal and said at least one threshold value as a bounded control signal to limit the frequency of the oscillator to the selected range.  
     
     
         28 . The apparatus of  claim 27 , wherein said at least one threshold register that stores at least one threshold value is a high limit register that stores said upper value and a low limit register that stores said lower value.  
     
     
         29 . The apparatus of  claim 28 , wherein the frequency range bounder includes an output multiplexer that selects one of the upper value, the control signal, and the lower value as the bounded control signal and outputs the bounded control signal to the oscillator to bound the oscillator frequency between an upper level and a lower level.  
     
     
         30 . The apparatus of  claim 29 , wherein the frequency range bounder includes at least one of a high comparator and a low comparator coupled to the output multiplexer, wherein the high comparator compares the control signal with said upper value and the low comparator compares the control signal with said lower value, and wherein the output multiplexer outputs the upper value as the bounded control signal if the control signal is above the upper value and outputs the lower value as the bounded control signal if the control signal is below the lower value.  
     
     
         31 . A method for outputting an oscillator-generated clock signal for video reconstruction in a terminal, comprising the steps of: 
 receiving an incoming video signal in a control logic circuit with a phase locked loop;    phase locking to a clock signal portion of the incoming video signal;    outputting a clock signal with an oscillator; and    limiting a frequency of said oscillator to a selected range using a frequency range bounder in the phase locked loop,    wherein the selected range being defined by an upper value and a lower value that is different from said upper value, and    wherein the frequency range bounder receives a control signal and limits the oscillator frequency based on the control signal.    
     
     
         32 . The method of  claim 31 , wherein the incoming video signal is a digital signal and the clock signal portion of the incoming video signal is program clock reference data for the digital signal.  
     
     
         32 . The method of  claim 31 , further comprising outputting a bounded control signal from the frequency range bounder to the oscillator.  
     
     
         33 . The method of  claim 32 , wherein the limiting step includes selecting one of the upper value, the control signal, and the lower value as the bounded control signal.  
     
     
         34 . The method of  claim 31 , wherein the limiting step comprises: 
 comparing the control signal with at least one of said upper value and said lower value;    outputting the upper value as the bounded control signal if the control signal is above the upper value; and    outputting the lower value as the bounded control signal if the control signal is below the lower value.    
     
     
         35 . A circuit for controlling an oscillator that outputs a clock signal for video reconstruction, comprising: 
 a control logic circuit with a phase locked loop for receiving an incoming video signal and phase locking to a clock signal portion of the incoming video signal, wherein the control logic circuit outputs a control signal for controlling an output of the oscillator based on the phase lock; and    a frequency range bounder in the phase locked loop that receives the control signal and outputs a bounded control signal that bounds the frequency of the oscillator to a selected range;    wherein said frequency range bounder is configured to generate a high limit signal and a low limit signal that is different from said high limit signal, and then select one of said control signal, said high limit signal or said low limit signal for transmission to said oscillator depending on whether said control signal remains within pre-defined high and low limits.    
     
     
         36 . The circuit of  claim 35 , further comprising a multiplexer which receives said control signal, said high limit signal and said low limit signal and selectively transmits said control signal, said high limit signal or said low limit signal to said oscillator depending on whether said control signal remains within pre-defined high and low limits.  
     
     
         37 . The circuit of  claim 36 , further comprising a high limit register for outputting said high limit signal and a low limit register for outputting said low limit signal.  
     
     
         38 . The circuit of  claim 37 , further comprising a high comparator for comparing said control signal and said high limit signal, wherein the output of said high comparator is provided to said multiplexer.  
     
     
         39 . The circuit of  claim 37 , further comprising a low comparator for comparing said control signal and said low limit signal, wherein the output of said low comparator is provided to said multiplexer.  
     
     
         40 . The circuit of  claim 35 , further comprising: 
 a high limit register for outputting said high limit signal;    a low limit register for outputting said low limit signal; and    a comparator receiving said control signal, said high limit signal and said low limit signal;    wherein said comparator selects said control signal, said high limit signal or said low limit signal for transmission to said oscillator depending on whether said control signal remains within pre-defined high and low limits.    
     
     
         41 . A method of controlling an oscillator that outputs a clock signal for video reconstruction, wherein said oscillator is controlled to remain within high and low frequency bounds, said method comprising: 
 receiving an incoming video signal and phase locking to a clock signal portion of the incoming video signal;    outputting a control signal for controlling an output of the oscillator based on the phase lock;    generating a high limit signal and a low limit signal, said high and low limit signals being different; and    selecting one of said control signal, said high limit signal or said low limit signal for transmission to said oscillator depending on whether said control signal remains within pre- defined high and low limits, said low limit being lower than said high limit.    
     
     
         42 . The method of  claim 41 , further comprising: 
 receiving said control signal, said high limit signal and said low limit signal with a multiplexer; and    with said multiplexer, selectively transmitting said control signal, said high limit signal or said low limit signal to said oscillator depending on whether said control signal remains within pre-defined high and low limits.    
     
     
         43 . The method of  claim 42 , further comprising: 
 comparing said control signal and said high limit signal with a high comparator; and    controlling said multiplexer with an output of said high comparator.    
     
     
         44 . The method of  claim 42 , further comprising: 
 comparing said control signal and said low limit signal with a low comparator; and    controlling said multiplexer with an output of said low comparator.    
     
     
         45 . The method of  claim 41 , further comprising: 
 receiving and comparing said control signal, said high limit signal and said low limit signal with a comparator; and,    with said comparator, selecting said control signal, said high limit signal or said low limit signal for transmission to said oscillator depending on whether said control signal remains within pre-defined high and low limits.    
     
     
         46 . A system for controlling an oscillator that outputs a clock signal for video reconstruction, wherein said oscillator is controlled to remain within high and low frequency bounds, said system comprising: 
 means for receiving an incoming video signal and phase locking to a clock signal portion of the incoming video signal;    means for outputting a control signal for controlling an output of the oscillator based on the phase lock;    means for generating a high limit signal and a low limit signal that is different from said high limit signal; and    means for selecting one of said control signal, said high limit signal or said low limit signal for transmission to said oscillator depending on whether said control signal remains within pre-defined high and low limits, wherein said low limit is lower than said high limit.