Chemical mechanical planarization method and apparatus for improved process uniformity, reduced topography and reduced defects

Abstract

A method and apparatus for utilizing an optimized polishing pad to increase planarity and reduce defects in CMP processing. The optimized polishing pad includes a polishing surface to remove material from and maintain a uniform polish rate with respect to a wafer surface. The polishing pad has a hardness between 62 and 98 shore A and a tensile modulus between 3,500 and 35,000 psi. A three-stage CMP process utilizes a hard pad, a first optimized pad and a second optimized pad to increase planarity while reducing surface defects.

We claim:  
     
         1 . A polishing pad, comprising a polishing surface to remove material from and maintain a uniform polish rate with respect to a wafer surface, the polishing pad having an associated hardness between 62 and 98 shore A and an associated tensile modulus between 3,500 and 35,000 psi.  
     
     
         2 . The polishing pad of  claim 1 , wherein the polishing pad further comprises a poromeric polyurethane coating on a polyurethane impregnated polyester felt substrate.  
     
     
         3 . The polishing pad of  claim 1 , wherein the polishing pad comprises one of a cast polyurethane material, polyurethane impregnated felt material or a coated polyurethane material on a substrate.  
     
     
         4 . The polishing pad of  claim 1 , wherein the polishing surface further comprises an embossed surface configured to distribute slurry when the polishing pad is used to polish the wafer surface.  
     
     
         5 . The polishing pad of  claim 1 , wherein the polishing pad has a pore size between 0.5 and 100 micro-meters.  
     
     
         6 . A composite polishing pad, comprising at least two coupled polishing pads wherein one of the polishing pads has a polishing surface configured to make contact with a wafer surface to remove material from and maintain a uniform polish rate with respect to the wafer surface, and each of the two polishing pads has a hardness between 62 and 98 shore A and a tensile modulus between 3,500 and 35,000 psi.  
     
     
         7 . The polishing pad of  claim 6 , wherein at least one of the coupled polishing pads further comprises a poromeric polyurethane coating on a polyurethane impregnated polyester felt substrate.  
     
     
         8 . The polishing pad of  claim 6 , wherein at least one of the coupled polishing pads comprises one of a cast polyurethane material, polyurethane impregnated felt material or a coated polyurethane material on a substrate.  
     
     
         9 . The polishing pad of  claim 6 , wherein the polishing surface further comprises an embossed surface configured to distribute slurry when the composite polishing pad is used to polish the wafer surface.  
     
     
         10 . A method, comprising: 
 reducing a step height of deposition material corresponding to a pattern of features underlying a top-most deposition layer of a wafer by applying a hard pad to the top-most deposition layer, wherein the hard pad has a hardness between 55 and 70 shore D and a tensile modulus between 45,000 and 90,000 psi;    removing bulk material corresponding to remaining portions of the top-most deposition layer to expose an underlying surface of the wafer by applying a first optimized pad to the remaining portions of the top-most deposition layer, wherein the first optimized pad has a hardness between 78 and 98 shore A and a tensile modulus between 10,000 and 35,000 psi; and    polishing a resulting exposed underlying surface of the wafer to reduce surface defects and maintain planarity by applying a second optimized pad, wherein the second optimized pad has a hardness between 62 and 78 shore A and a tensile modulus between 3,500 and 10,000 psi.    
     
     
         11 . The method of  claim 10 , wherein at least one of the hard pad, the first optimized pad, and the second optimized pad is comprised of a poromeric polyurethane coating on a polyurethane impregnated polyester felt substrate.  
     
     
         12 . The method of  claim 10 , wherein at least one of the hard pad, the first optimized pad, and the second optimized pad is comprised of one of a cast polyurethane material, polyurethane impregnated felt material or a coated polyurethane material on a substrate film.  
     
     
         13 . The method of  claim 10 , wherein a polishing surface of at least one of the hard pad, the first optimized pad, and the second optimized pad further comprises an embossed surface configured to distribute slurry when applied to the wafer surface.  
     
     
         14 . The method of  claim 10 , wherein the first optimized pad is a composite polishing pad further comprising at least two coupled polishing pads, wherein one of the coupled polishing pads has a polishing surface configured to make contact with a wafer surface and each of the coupled polishing pads has a hardness and a tensile modulus, when coupled, of between 78 and 98 shore A and 10,000 and 35,000 psi, respectively.  
     
     
         15 . The method of  claim 10 , wherein the second optimized pad is a composite polishing pad further comprising at least two coupled polishing pads, wherein one of the coupled polishing pads has a polishing surface configured to make contact with a wafer surface and each of the coupled polishing pads has a hardness and a tensile modulus, when coupled, of between 62 and 78 shore A and 3,500 and 10,000 psi, respectively.