Fabrication method of semiconductor integrated circuit device
Abstract
Provided is a fabrication method of a semiconductor integrated circuit device, which comprises disposing, in a ultrapure water preparing system, UF equipment having therein a UF module which has been manufactured by disposing, in a body thereof, a plurality of capillary hollow fiber membranes composed of a polysulfone membrane or polyimide membrane, bonding the plurality of hollow fiber membranes at end portions thereof by hot welding, and by this hot welding, simultaneously adhering the hollow fiber membranes to the body. Upon preparation of ultrapure water to be used for the fabrication of the semiconductor integrated circuit device, the present invention makes it possible to prevent run-off of ionized amine into the ultrapure water.
Claims
exact text as granted — not AI-modified1 . A method of fabrication of a semiconductor integrated circuit device, comprising the steps of:
(a) introducing water into a primary pure water purifying system as first raw material water; (b) introducing, as second raw material water, primary pure water which has been obtained by the purification of said first raw material water through use of said primary pure water purifying system, into a secondary pure water purifying system having a secondary pure water circulating loop; and (c) feeding a first wet treatment apparatus with secondary pure water which has been obtained by the purification of said second raw material water through use of said secondary pure water purifying system, thereby subjecting a semiconductor integrated circuit wafer to first wet treatment in the first wet treatment apparatus; step (c) including the sub-steps of: (C1) removing ions from the second raw material water through use of a cation removing filter in the secondary pure water circulating loop, the cation removing filter having a membrane sheet; (c2) removing foreign particles from the second raw material water which has passed through the cation removing filter through use of a heat welded ultrafiltration filter in the secondary pure water circulating loop; and (c3) feeding said first wet treatment apparatus with the secondary pure water which has passed through said ultrafiltration filter, wherein, from said secondary pure water that has been fed to said first wet treatment apparatus, an ionized amine or ionized amine substance has been removed to such an extent as not to affect the characteristics of the semiconductor integrated circuit device to be fabricated using said secondary pure water.
2 . A fabrication method according to claim 1 , wherein said ultrafiltration filter is a heat welded type.
3 . A fabrication method according to claim 1 , wherein said first wetting treatment is a cleaning treatment.
4 . A fabrication method according to claim 3 , wherein said semiconductor integrated circuit device comprises a flash memory portion.
5 . A fabrication method according to claim 4 , wherein the characteristics of said semiconductor integrated circuit device are write or erase characteristics of the flash memory portion.
6 . A fabrication method according to claim 5 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 20 nm or less.
7 . A fabrication method according to claim 5 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 10 nm or less.
8 . A fabrication method according to claim 5 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 5 nm or less.
9 . A method of fabrication of a semiconductor integrated circuit device, comprising the steps of:
(a) introducing water into a primary pure water purifying system as first raw material water; (b) introducing, as second raw material water, primary pure water, which has been obtained by the purification of said first raw material water through use of said primary pure water purifying system, into a secondary pure water purifying system having a secondary pure water circulating loop; and (c) feeding a first wet treatment apparatus with secondary pure water which has been obtained by the purification of said second raw material water through use of said secondary pure water purifying system, thereby subjecting a semiconductor integrated circuit wafer to first wet treatment in the first wet treatment apparatus; step (c) including the sub-steps of: (c1) removing foreign particles from the second raw material water through use of an ultrafiltration filter in the secondary pure water circulating loop; (c2) removing ions from said second raw material water which has passed through said ultrafiltration filter, by use of a cation removing filter in the secondary pure water circulating loop, the cation removing filter having a membrane sheet; and (c3) feeding said first wet treatment apparatus with said secondary pure water which has passed through said cation removing filter.
10 . A fabrication method according to claim 9 , wherein said ultrafiltration filter is a heat welded type.
11 . A fabrication method according to claim 9 , wherein said first wetting treatment is a cleaning treatment.
12 . A fabrication method according to claim 11 , wherein said semiconductor integrated circuit device has a flash memory portion.
13 . A fabrication method according to claim 12 , wherein the characteristics of said semiconductor integrated circuit device are write or erase characteristics of the flash memory portion.
14 . A fabrication method according to claim 11 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 20 nm or less.
15 . A fabrication method according to claim 11 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 10 nm or less.
16 . A fabrication method according to claim 11 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 5 nm or less.
17 . A method of fabrication of a semiconductor integrated circuit device, comprising the steps of:
(a) introducing water into a primary pure water purifying system as first raw material water; (b) introducing, as second raw material water, primary pure water which has been obtained by the purification of said first raw material water through use of said primary pure water purifying system, into a secondary pure water purifying system having a secondary pure water circulating loop; and (c) feeding a first wet treatment apparatus with secondary pure water which has been obtained by the purification of said second raw material water through use of said secondary pure water purifying system, thereby subjecting a semiconductor integrated circuit wafer to first wet treatment in the first wet treatment apparatus; step (c) including the sub-steps of: (c1) removing ions from the second raw material water through use of an ion removing filter disposed in said secondary pure water circulating loop, the ion removing filter having a membrane sheet, (c2) causing the second raw material water, which has passed through said ion removing filter, to pass through a heat welded type ultrafiltration filter disposed in said secondary pure water circulating loop, thereby removing foreign particles, and (c3) feeding said first wet treatment apparatus with said secondary pure water which has passed through said ultrafiltration filter.
18 . A fabrication method according to claim 17 , wherein said ion removing filter is a membrane type.
19 . A fabrication method according to claim 17 , wherein said first wet treatment is a cleaning treatment.
20 . A fabrication method according to claim 19 , wherein said semiconductor integrated circuit device has a flash memory portion.
21 . A fabrication method according to claim 20 , wherein the characteristics of said semiconductor integrated circuit device are write or erase characteristics of the flash memory portion.
22 . A fabrication method according to claim 21 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 20 nm or less.
23 . A fabrication method according to claim 21 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 10 nm or less.
24 . A fabrication method according to claim 21 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 5 nm or less.
25 . A fabrication method according to claim 17 , wherein said ion removing filter is a cation removing filter.
26 . A fabrication method according to claim 9 , wherein said secondary pure water fed to said first wet treatment apparatus is sufficiently free of ionized amine or ionized amine substance so as not to affect characteristics of the semiconductor integrated circuit device to be fabricated using said secondary pure water.
27 . A fabrication method according to claim 17 , wherein said secondary pure water fed to said first wet treatment apparatus is sufficiently free of ionized amine or ionized amine substance so as not to affect characteristics of the semiconductor integrated circuit device to be fabricated using said secondary pure water.
28 . A method of fabrication of a semiconductor integrated circuit device, comprising the steps of:
(a) introducing water into a primary pure water purifying system as first raw material water; (b) introducing, as second raw material water, primary pure water which has been obtained by the purification of said first raw material water through use of said primary pure water purifying system, into a secondary pure water purifying system having a secondary pure water circulating loop; and (c) feeding a first wet treatment apparatus with secondary pure water which has been obtained by the purification of said second raw material water through use of said secondary pure water purifying system, thereby subjecting a semiconductor integrated circuit wafer to first wet treatment in the first wet treatment apparatus; step (c) including the sub-steps of: (c1) removing ions from the second raw material water through use of a cation removing filter in the secondary pure water circulating loop, the cation removing filter having a membrane sheet; and (c2) feeding said first wet treatment apparatus with the secondary pure water which has passed through said cation removing filter, wherein, from said secondary pure water that has been fed to said first wet treatment apparatus, an ionized amine or ionized amine substance has been removed to such an extent as not to affect characteristics of the semiconductor integrated circuit device to be fabricated using said secondary pure water.
29 . A fabrication method according to claim 28 , wherein said first wet treatment is a cleaning treatment.
30 . A fabrication method according to claim 29 , wherein said semiconductor integrated circuit device comprises a flash memory portion.
31 . A fabrication method according to claim 30 , wherein the characteristics of said semiconductor integrated circuit device are write or erase characteristics of the flash memory portion.
32 . A fabrication method according to claim 31 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 20 nm or less.
33 . A fabrication method according to claim 31 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 10 nm or less.
34 . A fabrication method according to claim 31 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 5 nm or less.
35 . A method of fabrication of a semiconductor integrated circuit device, comprising the steps of:
(a) introducing water into a primary pure water purifying system as first raw material water; (b) introducing, as second raw material water, primary pure water, which has been obtained by the purification of said first raw material water through use of said primary pure water purifying system, into a secondary pure water purifying system having a secondary pure water circulating loop; and (c) feeding a first wet treatment apparatus with secondary pure water which has been obtained by the purification of said second raw material water through use of said secondary pure water purifying system, thereby subjecting a semiconductor integrated circuit wafer to first wet treatment in the first wet treatment apparatus; step (c) including the sub-steps of: (c1) removing foreign particles from the second raw material water through use of a heat welded ultrafiltration filter in the secondary pure water circulating loop; and (c2) feeding said first wet treatment apparatus with the secondary pure water which has passed through said ultrafiltration filter, wherein, from said secondary pure water that has been fed to said first wet treatment apparatus, an ionized amine or ionized amine substance has been removed to such an extent as not to affect characteristics of the semiconductor integrated circuit device to be fabricated using said secondary pure water.
36 . A fabrication method according to claim 35 , wherein said first wet treatment is a cleaning treatment.
37 . A fabrication method according to claim 36 , wherein said semiconductor integrated circuit device comprises a flash memory portion.
38 . A fabrication method according to claim 37 , wherein the characteristics of said semiconductor integrated circuit device are write or erase characteristics of the flash memory portion.
39 . A fabrication method according to claim 38 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 20 nm or less.
40 . A fabrication method according to claim 38 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 10 nm or less.
41 . A fabrication method according to claim 38 , wherein said semiconductor integrated circuit device has an MISFET whose gate insulating film or a tunnel oxide film has a thickness, in terms of a silicon oxide film, of 5 nm or less.Join the waitlist — get patent alerts
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