HV-SOI LDMOS device with integrated diode to improve reliability and avalanche ruggedness

Abstract

A hybrid semiconductor device is presented in which one or more diode regions are integrated into a transistor region. In a preferred embodiment the transistor region is a continuous (self-terminating) SOI LDMOS device in which are integrated one or more diode portions. Within the diode portions, since there is only one PN junction, the mechanism for breakdown failure due to bipolar turn-on is nonexistent. The diode regions are formed such that they have a lower breakdown voltage than the transistor region, and thus any transient voltage (or current) induced breakdown is necessarily contained in the diode regions. In a preferred embodiment, the breakdown voltage of the diode portions is lowered by narrowing their field plate length relative to the transistor portion of the device. This allows the device to survive any such breakdown without being destroyed, resulting in a more rugged and more reliable device.

1 - 9 . (cancelled)  
     
     
         10 . A method of constructing a rugged transistor device, comprising: 
 integrating in the device one or more nontransistor regions whose future performance is not damaged by an overvoltage breakdown; and    arranging the device such that overvoltage breakdown always occurs in said nontransistor region.    
     
     
         11 . The method of  claim 11 , where the nontransistor regions each comprises a diode;  
     
     
         12 . The method of  claim 12 , where the nontransistor regions have a lower breakdown voltage than that of the transistor.  
     
     
         13 . The method of  claim 13 , where the nontransistor regions have a shorter field plate length than that of the transistor.  
     
     
         14 . The method of  claim 14  where the diode regions have a nearly identical structure as the transistor regions.  
     
     
         15 - 16 . (cancelled)  
     
     
         17 . A method of obviating bipolar second breakdown in MOS transistor devices, comprising: 
 integrating one or more diode regions in the MOS device; and    setting the breakdown voltage of the diode devices to be lower than that of the MOS transistor regions.    
     
     
         18 . The method of  claim 17 , where the lower breakdown voltage of the diode regions is set by shortening the field plate relative to the transistor regions.