Nonvolatile semiconductor memory and read method

Abstract

In a nonvolatile semiconductor memory in which multiple-value information is stored in one memory cell by setting a plurality of threshold values, data is successively read from word lines while continuously changing the word-line read level from a lowest level to a highest level, and the next bit line is selectively precharged in accordance with the data stored in latch means for storing read data.

What is claimed is:  
     
         1 . A nonvolatile memory system comprising: 
 a controller; and    a nonvolatile memory,    wherein said controller is capable of issuing arbitrary operation commands to said nonvolatile memory,    wherein said operation commands include a program command,    wherein said nonvolatile memory comprises a plurality of memory cells, each of which has a threshold voltage within one of voltage ranges,    wherein, when said nonvolatile memory receives said program command from said controller, said nonvolatile memory performs a first sequence and a second sequence,    wherein, in said first sequence, said nonvolatile memory controls selecting first ones of said plurality of memory cells, moving threshold voltages of said first ones into a first voltage range, checking whether all of the threshold voltages of said first ones have been moved into said first voltage range or not, repeating moving and checking when one or more threshold voltages of said first ones have not been moved into said first voltage range, and finishing said first sequence when all of the threshold voltages of said first ones have been moved into said first voltage range,    wherein, in said second sequence, said nonvolatile memory controls selecting second ones of said plurality of memory cells, moving threshold voltage of said second ones into a second voltage range, checking whether all of the threshold voltages of said second ones have been moved into said second voltage range or not, repeating moving and checking when one or more threshold voltages of said second ones have not been moved into said second voltage range, and finishing said second sequence when all of the threshold voltages of said second ones have been moved into said second voltage range, and    wherein threshold voltages of both of said first ones of said memory cells and said second ones of said memory cells are included in a third voltage range before performing said first sequence.    
     
     
         2 . A nonvolatile memory system according to  claim 1 , 
 wherein, when said nonvolatile memory receives said program command from said controller, said nonvolatile memory further performs a third sequence,    wherein, in said third sequence, said nonvolatile memory controls selecting third ones of said plurality of memory cells, moving threshold voltages of said third ones into a third voltage range, checking whether all of the threshold voltages of said third ones have been moved into said third voltage range or not, repeating moving threshold voltages and checking threshold voltages when one or more threshold voltages of said third ones have not been moved into said third voltage range, and finishing said third sequence when all of threshold voltages of said third ones have been moved into said third voltage range.    
     
     
         3 . A nonvolatile memory system according to  claim 2 , 
 wherein said checking of threshold voltages is a verify operation.    
     
     
         4 . A nonvolatile memory system according to  claim 3 , 
 wherein said first voltage range has a first upper limit voltage and a first lower limit voltage,    wherein said second voltage range has a second upper limit voltage and a second lower limit voltage, and    wherein said third voltage range has a third lower limit voltage.    
     
     
         5 . A nonvolatile memory system according to  claim 3 , 
 wherein said first voltage range, said second voltage range and said third voltage range are not overlapped with each other.    
     
     
         6 . A nonvolatile memory system comprising: 
 a controller; and    a nonvolatile memory,    wherein said controller is capable of issuing an arbitrary one of operation commands to said nonvolatile memory,    wherein said operation commands include a program command,    wherein said nonvolatile memory comprises a plurality of memory cells, each of which has a threshold voltage within one of voltage ranges,    wherein, when said nonvolatile memory receives said program command from said controller, said nonvolatile memory performs a first sequence, a second sequence and a third sequence,    wherein, in said first sequence, said nonvolatile memory controls selecting first ones of said plurality of memory cells, moving threshold voltages of said first ones into a first voltage range, and finishing said first sequence when all of the threshold voltages of said first ones have been moved into said first voltage range,    wherein, in said second sequence, said nonvolatile memory controls selecting second ones of said plurality of memory cells, moving threshold voltage of said second ones into a second voltage range, checking whether all of the threshold voltages of said second ones have been moved into said second voltage range or not, repeating moving and checking when one or more threshold voltages of said second ones have not been moved into said second voltage range, and finishing said second sequence when all of threshold voltages of said second ones have been moved into said second voltage range, and    wherein, in said third sequence, said nonvolatile memory controls selecting third ones of said plurality of memory cells, moving threshold voltages of said third ones into a third voltage range, checking whether all of threshold voltages of said third ones have been moved into said third voltages range or not, repeating moving threshold voltages and checking threshold voltages when one or more threshold voltages of said third ones have not been moved into said third voltage range, and finishing said third sequence when all of the threshold voltages of said third ones have been moved into said third voltage range.    
     
     
         7 . A nonvolatile memory system according to  claim 6 , 
 wherein said checking threshold voltages is a verify operation.    
     
     
         8 . A nonvolatile memory system according to  claim 7 , 
 wherein said first voltage range has a first upper limit voltage,    wherein said second voltage range has a second upper limit voltage and a second lower limit voltage, and    wherein said third voltage range has a third upper limit voltage and a third lower limit voltage.    
     
     
         9 . A nonvolatile memory system according to  claim 8 , 
 wherein said first voltage range, said second voltage range and said third voltage range are not overlapped with each other.