Method and system to manufacture stacked chip devices

Abstract

A method and system for electrically interconnecting a semiconductor device and a component is presented. The semiconductor device includes a dielectric portion on at least one face thereof. Similarly, the component includes a dielectric portion on at least one face thereof The device and component are constructed and arranged to be stacked and bonded together. A first laser selectively ablates the respective dielectric portions of the device and component. The ablating creates a starting pad on the device or component and a destination pad on the device or component. A second laser deposits a conductor along a path between the starting pad and destination pad. As such, smaller, more condensed electronic packages may be fabricated.

1 - 17  (Cancelled).  
     
     
         18 . An electronic package including interconnected chips, comprising: 
 a semiconductor device including a dielectric portion on at least one face thereof;    a component stacked with and bonded to the semiconductor device, the component including a dielectric portion on at least one face thereof; and    at least one interconnection between the device and component, the interconnection comprising a conductor along a path between a starting pad on one of the device and component and a destination pad on the other of the device and component, the starting pad and destination pad being created by selectively ablating, by at least a first laser, the respective dielectric portions of the device and component, and the conductor being deposited along the path by at least a second laser.    
     
     
         19 . The electronic package of  claim 18 , further comprising a second semiconductor device constructed and arranged to interpose the device and component and to be stacked with and bonded to the device and component.  
     
     
         20 . The electronic package of  claim 18 , wherein the dielectric portion of the device comprises silicon oxide (SiOx).  
     
     
         21 . The electronic package of  claim 18 , wherein the dielectric portion of the device comprises a polyimide-type polymeric compound.  
     
     
         22 . The electronic package of  claim 18 , wherein the at least one face of the device comprises a top face or an edge face.  
     
     
         23 . The electronic package of  claim 18 , wherein the component is a semiconductor device.  
     
     
         24 . The electronic package of  claim 18 , wherein the component is a carrier substrate.  
     
     
         25 . The electronic package of  claim 18 , wherein the at least one interconnection is exclusive of a wire bond interconnection.  
     
     
         26 . The electronic package of  claim 18 , wherein the at least one interconnection is exclusive of an encapsulant.