Method of forming a low resistance semiconductor device and structure therefor

Abstract

A transistor ( 10 ) is formed with a low resistance trench structure that is utilized for a gate ( 17 ) of the transistor. The low resistance trench structure facilitates forming a shallow source region ( 49 ) that reduces the gate-to-source capacitance.

1 . A method of forming a semiconductor device having a low resistance trench element comprising: 
 providing a semiconductor substrate of a first conductivity type, the semiconductor substrate having a surface;    forming an opening extending a first distance from the surface into the semiconductor substrate and extending a lateral distance laterally across the surface of the semiconductor substrate;    forming an insulator on sidewalls of the opening; and    forming a gate material filling the opening and extending a second distance out of the opening past the surface including the forming the gate material extending out of the opening for at least a portion of the lateral distance across the surface of the semiconductor substrate.    
     
     
         2 . The method of  claim 1  wherein forming the gate material filling the opening and extending the second distance out of the opening includes forming the portion of the lateral distance to be at least twenty percent of the lateral distance.  
     
     
         3 . The method of  claim 1  further including forming a region of a second conductivity type on the surface of the semiconductor substrate and extending a third distance into the semiconductor substrate wherein the third distance is no greater than the first distance.  
     
     
         4 . The method of  claim 1  wherein forming the insulator on sidewalls of the opening includes forming a gate insulator of an MOS transistor on interior surfaces of the opening.  
     
     
         5 . The method of  claim 4  wherein forming the gate insulator includes forming a silicon dioxide layer.  
     
     
         6 . The method of  claim 4  wherein forming the gate material filling the opening and extending the second distance out of the opening includes forming a polysilicon material filling the opening and extending the second distance out of the opening.  
     
     
         7 . The method of  claim 1  further including forming a source region extending from the surface a distance no greater than 300 nano-meters into the semiconductor substrate and abutting the insulator and further including forming a dielectric covering the gate material filling the opening.  
     
     
         8 . (Canceled).  
     
     
         9 . (Canceled).  
     
     
         10 . (Canceled).  
     
     
         11 . (Canceled).  
     
     
         12 . (Canceled).  
     
     
         13 . (Canceled).  
     
     
         14 . (Canceled).  
     
     
         15 . (Canceled).  
     
     
         16 . A semiconductor device comprising: 
 a semiconductor substrate having a surface and an opening extending from the surface into the opening, the opening also extending a lateral distance across the surface of the semiconductor substrate;    an insulator lining the opening;    a gate material in the opening and extending a first distance out past the surface wherein the gate material extends the first distance past the surface of the substrate laterally across the surface and overlying the opening for at least a portion of the lateral distance; and    a source region on the surface adjacent to the insulator and extending a second distance into the semiconductor substrate, the source region abutting the insulator.    
     
     
         17 . The semiconductor device of  claim 16  wherein the second distance is no greater than 300 nano-meters.  
     
     
         18 . The semiconductor device of  claim 16  wherein the gate material is a conductor.  
     
     
         19 . The semiconductor device of  claim 16  wherein the first distance is less than approximately fifty percent of a depth of the gate material into the semiconductor substrate.  
     
     
         20 . The semiconductor device of  claim 16  wherein the portion of the lateral distance is at least twenty percent of the lateral distance.  
     
     
         21 . The semiconductor device of  claim 16  wherein the portion of the lateral distance is at least fifty percent of the lateral distance.