Method and computer program product for software/hardware language model conversion

Abstract

The first model described in a software description language is converted into the second model described in a hardware description language without considering whether a plurality of parallel procedures for writing with respect to the same shared variable are contained in the first model. It is detected whether a plurality of parallel processes corresponding to the plurality of parallel procedures for writing with respect to the same shared variable exist in the second model obtained in this manner. A value solving process is generated, in which a pair of a data signal and an assignment timing signal are input from each process of all or some of the detected parallel processes, and a signal of the data signals which corresponds to a process in which the assignment timing signal has changed is output to a signal holding the value of the shared variable.

1 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 converting the first code to the second code;    detecting from the second code a plurality of processes that correspond to a plurality of parallel procedures in the first code;    identifying which ones of the plurality of processes assign values to an identical shared variable; and    generating a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received.    
     
     
         2 - 4  (Canceled).  
     
     
         5 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 detecting from the first code a plurality of processes that correspond to a plurality of parallel procedures in the second code;    identifying which ones of the plurality of parallel procedures assigns values to an identical shared variable;    converting the first code to the second code; and    generating a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received.    
     
     
         6 - 8  (Canceled).  
     
     
         9 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 converting the first code to the second code;    detecting from the second code a plurality of processes that correspond to a plurality of parallel procedures in the first code;    identifying which ones of the plurality of processes assign values to an identical shared variable; and    generating a procedure call solving process which exclusively controls a call operation to the parallel procedure by the detected process, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal, from each of the detected processes, as an input, includes terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         10 - 11  (Canceled).  
     
     
         12 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 detecting from the first code a plurality of procedures that correspond to a plurality of parallel procedures in the second code;    identifying which ones of the plurality of parallel procedures assign values to an identical shared variable;    converting the first code to the second code; and    generating a procedure call solving process which exclusively controls an operation of a plurality of processes corresponding to the detected procedures, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         13 - 14 . (Canceled).  
     
     
         15 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 converting the first code to the second code;    detecting from the second codes a plurality of process that correspond to a plurality of parallel procedures in the first code;    identifying which ones of the plurality of processes assign values to an identical shared variable;    generating a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes, as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received;    converting the value solving process relating to a procedure call between parallel programs to a procedure call solving process wherein the procedure call solving process includes pairs of an call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         16 . A software/hardware language model conversion method for converting a first code described in a software description language to a second code described in a hardware description language, the method comprising: 
 detecting from the first code a plurality of processes that correspond to a plurality of parallel procedures in the second code;    identifying which ones of the plurality of processes assign values to an identical shared variable; and    converting the first code to the second code;    generating a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes, as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received, each data signal indicating a value of the shared variable; and    converting the one of the value solving process relating to a procedure call between parallel programs to a procedure call solving process, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         17 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to convert the first code to the second code;    a computer code device configured to detect from the second code a plurality of processes that correspond to a plurality of parallel procedures in the first code;    a computer code device configured to identity which ones of the plurality of processes assign values to an identical shared variable; and    a computer code device configured to generate a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received.    
     
     
         18 - 20 . (Canceled).  
     
     
         21 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to detect from the first code a plurality of processes that correspond to a plurality of parallel procedures in the second code;    a computer code device configured to identify which ones of the plurality of processes assign values to an identical shared variable;    a computer code device configured to convert the first code to the second code; and    a computer code device configured to generate a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received.    
     
     
         22 - 24 . (Canceled).  
     
     
         25 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to convert the first code to the second code;    a computer code device configured to detect from the second code a plurality of processes that correspond to a plurality of procedures in the first code;    a computer code device configured to identify which ones of the plurality of processes assign values to an identical shared variable; and    a computer code device configured to generate a procedure call solving process which exclusively controls a call operation to the parallel procedure by the detected process, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal, from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         26 - 27 . (Canceled).  
     
     
         28 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to detect from the first code a plurality of procedures that correspond to a plurality of parallel procedures in the second code;    a computer code device configured to identify which ones of the plurality of procedure assign values to an identical shared variable;    a computer code device configured to convert the first code to the second code; and    a computer code device configured to generate a procedure call solving process which exclusively controls an operation of a plurality of processes corresponding to the detected procedures, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         29 - 30 . (Canceled).  
     
     
         31 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to convert the first code to the second code;    a computer code device configured to detect from the second code a plurality of processes that correspond to a plurality of parallel procedures in the first code;    a computer code device configured to identify which ones of the plurality of processes assign values to an identical shared variable;    a computer code device configured to generate a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes, as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received;    a computer code device configured to convert the value solving process relating to a procedure call between parallel programs to a procedure call solving process wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.    
     
     
         32 . A computer program product comprising: 
 a computer storage medium and a computer program code mechanism embedded in the computer storage medium for causing a computer to convert a first code described in a software description language to a second code described in a hardware description language, the computer code mechanism comprising:    a computer code device configured to detect from the first code a plurality of processes that correspond to a plurality of parallel procedures in the second code;    a computer code device configured to identify which ones of the plurality of processes assign values to an identical shared variable;    a computer code device configured to convert the first code to the second code;    a computer code device configured to generate a value solving process for the detected processes corresponding to the parallel procedures, wherein the value solving process includes pairs of a data signal and an assignment timing signal from each of the detected processes, as an input, includes any one of data signals corresponding to a change of the assignment timing signal, as an output, and maintains the data signals unless an input signal is received, each data signal indicating a value of the shared variable; and    a computer code device configured to convert the one of the value solving process relating to a procedure call between parallel programs to a procedure call solving process, wherein the procedure call solving process includes pairs of a call timing signal and an argument data signal from each of the detected processes, as an input, includes a terminal signal and a return value signal, as an output to the processes, from the called procedure, and performs exclusive processing with respect to calls from a plurality of processes.