Reliability barrier integration for Cu application
Abstract
Embodiments of the present invention provide a process sequence and related hardware for filling a patterned feature on a substrate with a metal, such as copper. The sequence comprises first forming a reliable barrier layer in the patterned feature to prevent diffusion of the metal into the dielectric layer through which the patterned feature is formed. One sequence comprises forming a generally conformal barrier layer over a patterned dielectric, etching the barrier layer at the bottom of the patterned feature, depositing a second barrier layer, and then filling the patterned feature with a metal, such as copper.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition, wherein the second barrier layer is selected from the group consisting of TiSiN x and TaSiN x ; and then d) depositing one or more conductive materials.
2 . The method of claim 1 wherein the depositing one or more conductive materials comprises depositing a seed layer and a metal layer in the via and/or trench after the second barrier layer is deposited.
3 . The method of claim 2 wherein the seed layer and the metal layer are copper.
4 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein the first barrier layer is deposited and removed from the horizontal surfaces of the patterned substrate within a single chamber of an integrated processing tool.
5 . The method of claim 4 wherein the chamber is an atomic layer deposition chamber and the first barrier layer is deposited and etched in the chamber.
6 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein depositing the conductive material comprises depositing a seed layer and a metal layer in the via and/or the trench after the second barrier layer is deposited, and wherein the seed layer is deposited by chemical vapor deposition or electrodes deposition.
7 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein depositing the conductive material comprises depositing a seed layer and a metal layer in the via and/or the trench after the second barrier layer is deposited, and wherein the metal layer is deposited by chemical vapor deposition or physical vapor deposition.
8 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein the via has an aspect ratio of about 4 to 1 and the trench has an aspect ratio of from about 1 to about 1.
9 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein the second barrier layer has a thickness of from about 20 Å to about 50 Å at the bottom of the via.
10 . A method of filling one or more of a via and a trench in a patterned substrate, comprising:
a) depositing a generally conformal first barrier layer on the patterned substrate by atomic layer deposition; b) removing the first barrier layer from the horizontal surfaces of the patterned substrate; c) depositing a second barrier layer by physical vapor deposition; and then d) depositing one or more conductive materials, wherein the second barrier layer is selected from the group consisting of Ta, TaN, W, WN x , Ti, and TiN, and the second barrier layer has a thickness of from about 20 Å to about 50 Å at the bottom of the via.Join the waitlist — get patent alerts
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