Input/output circuit of semiconductor integrated circuit

Abstract

The input/output circuit of the present invention includes a first p-channel transistor and a charge drawing circuit. The first p-channel transistor is connected to an input/output pad of the semiconductor integrated circuit. The charge drawing circuit, driven with a control signal, draws a charge from an n-well diffusion region of the p-channel transistor during output. By the charge drawing, the potential at the n-well diffusion region of the p-channel transistor is kept at the supply voltage during output, and thus the input/output circuit is prevented from deterioration in current flow capability due to a back bias effect.

1 - 20 . (Cancelled)  
     
     
         21 . An input/output circuit of a semiconductor integrated circuit, comprising: 
 a first p-channel transistor connected to an input/output pad of the semiconductor integrated circuit; and    a charge drawing circuit for drawing a charge from an n-well diffusion region of the first p-channel transistor when the input/output circuit is in an output state.    
     
     
         22 . An input/output circuit of a semiconductor integrated circuit, comprising: 
 a first p-channel transistor connected to an input/output pad of the semiconductor integrated circuit;    a charge drawing circuit for drawing a charge from an n-well diffusion region of the first p-channel transistor; and    a n-channel transistor connected between the n-well diffusion region of the first p-channel transistor and the charge drawing circuit.    
     
     
         23 . An input/output circuit of a semiconductor integrated circuit, comprising: 
 a first n-channel transistor connected to an input/output pad of the semiconductor integrated circuit; and    a charge drawing circuit for drawing a charge from a p-well diffusion region of the first n-channel transistor when the input/output circuit is in an output state.    
     
     
         24 . The input/output circuit of  claim 23 , further comprising: 
 a p-channel transistor connected between the p-well diffusion region of the first n-channel transistor and the charge drawing circuit.    
     
     
         25 . An input/output circuit for outputting a signal from an internal circuit of a semiconductor integrated circuit to an input/output pad of the semiconductor integrated circuit, comprising: 
 a first p-channel transistor connected between a power supply node receiving a supply voltage internal to the semiconductor integrated circuit and the input/output pad, a gate of the first p-channel transistor receiving a signal from an internal circuit of the semiconductor integrated circuit directly or indirectly; and    a charge drawing circuit for drawing a charge from an n-well diffusion region of the first p-channel transistor to a ground node receiving a ground voltage when the input/output circuit outputs the signal from the internal circuit to the input/output pad.    
     
     
         26 . An input/output circuit for outputting a signal from an internal circuit of a semiconductor integrated circuit to an input/output pad of the semiconductor integrated circuit, comprising: 
 a first n-channel transistor connected between a ground node receiving a ground voltage and the input/output pad, a gate of the first n-channel transistor receiving a signal from an internal circuit of the semiconductor integrated circuit directly or indirectly; and    a charge drawing circuit for drawing a charge from a p-well diffusion region of the first n-channel transistor to a power supply node receiving a supply voltage internal to the semiconductor integrated circuit when the input/output circuit outputs the signal from the internal circuit to the input/output pad.    
     
     
         27 . The input/output circuit of  claim 21 , wherein the charge drawing circuit draws the charge from the n-well diffusion region to a ground node.  
     
     
         28 . The input/output circuit of  claim 23 , wherein the charge drawing circuit draws the charge from the p-well diffusion region to a power supply node.