Thin film transistor device and method of manufacturing the same

Abstract

In a case of a liquid crystal display apparatus, a gate insulating film of a TFT driven at a low voltage (3.3 V or 5 V) is constituted by one insulating film, and a thickness thereof is set to, for example, 30 nm. This TFT has a structure in which LDD regions (low concentration impurity regions) are not provided. A TFT having a CMOS structure, which is driven at a high voltage (18 V), has a gate insulating film constituted by two insulating films having a thickness of, for example, 130 nm in total. In an n-type TFT, a low concentration impurity region is provided on a drain side. A p-type TFT has a structure having no LDD region. A pixel TFT has a gate insulating film constituted by two insulating films, and LDD regions provided in both of its source/drain.

1 . A thin film transistor device, comprising: 
 a plurality of first, second and third thin film transistors, each including first, second and third semiconductor films formed on a substrate, first and second insulating films, and first, second and third gate electrodes,    wherein in a formation region for forming said first thin film transistor, said first insulating film is formed on said first semiconductor film, said first gate electrode is formed on said first insulating film, said second insulating film is formed on said first insulating film and said first gate electrode, and a pair of high concentration impurity regions in which tip portions thereof closer to a channel region are positioned below edges of said first gate electrode are formed in said first semiconductor film, thus forming said first thin film transistors;    in a formation region for forming said second thin film transistor, said first and second insulating films are laminated on said second semiconductor film, said second gate electrode is formed on said second insulating film, and a pair of high concentration impurity regions in which at least one tip portion thereof closer to a channel region overlaps an edge portion of said second gate electrode when viewed from above are formed in said second semiconductor film, thus forming said second thin film transistors; and    in a formation region for forming said third thin film transistor, said first and second insulating films are laminated on said third semiconductor film, said third gate electrode is formed on said second insulating film, a pair of high concentration impurity regions and a pair of low concentration impurity regions, which are arranged between the respective high concentration impurity regions and a channel region and in which a tip portion closer to the channel region is disposed below an edge of said third gate electrode, are formed in said third semiconductor film, thus forming said third thin film transistors.    
     
     
         2 . The thin film transistor device according to  claim 1 , wherein 
 in an n-type thin film transistor among said second thin film transistors, only a tip portion of the high concentration impurity region of the pair of high concentration impurity regions, which is closer to a source thereof, overlaps the edge portion of said second gate electrode, and a low concentration impurity region is provided between the high concentration impurity region closer to a drain thereof and the channel region;    in a p-type thin film transistor among said second thin film transistors, any of the tip portions of the pair of high concentration impurity regions closer to the channel region overlaps the edge portion of said second gate electrode.    
     
     
         3 . The thin film transistor device according to  claim 1 , wherein a storage capacitance electrode constituting a storage capacitance is formed in a wiring layer which is the same as said first gate electrode.  
     
     
         4 . The thin film transistor device according to  claim 1 , wherein a source electrode and a drain electrode of each of said first, second and third thin film transistors are formed in the same wiring layer as said second and third gate electrodes.  
     
     
         5 . A method of manufacturing a thin film transistor device, comprising: 
 a step for forming a semiconductor film on a substrate, patterning the semiconductor film to form first, second and third semiconductor films;    a step for forming a first insulating film on said substrate, said first insulating film covering said first, second and third semiconductor films;    a step for forming a first metal film on said first insulating film, patterning the first metal film, forming a first gate electrode on said first insulating film above said first semiconductor film, and forming first and second metal patterns on said first insulating film above said second and third semiconductor films;    a first impurity injection step for injecting impurities into said first, second and third semiconductor films using said first gate electrode and said first and second metal patterns as a mask;    a step for removing said first and second metal patterns;    a step for forming a second insulating film on said first insulating film and said first gate electrode above said first, second and third semiconductor films;    a step for forming second and third gate electrodes on said second insulating film above said second and third semiconductor films; and    a second impurity injection step for injecting impurities into said third semiconductor film using said third gate electrode as a mask.    
     
     
         6 . The method of manufacturing a thin film transistor device according to  claim 5 , wherein said second gate electrode is formed so as to deviate from a position of said first metal pattern in the width direction.  
     
     
         7 . The method of manufacturing a thin film transistor device according to  claim 6 , wherein in said second impurity injection step, the impurities are injected into a side portion of said second gate electrode with a dose amount less than that of said first impurity injection step.  
     
     
         8 . The method of manufacturing a thin film transistor device according to  claim 5 , wherein a width of said second gate electrode is formed to be larger than that of said first metal pattern.  
     
     
         9 . The method of manufacturing a thin film transistor device according to  claim 5 , wherein a width of said third gate electrode is formed to be smaller than that of said second metal pattern.  
     
     
         10 - 11 . (Cancelled)  
     
     
         12 . A thin film transistor device, comprising: 
 first and second thin film transistors formed on a substrate, wherein    said first thin film transistor including:    a first semiconductor film having a pair of high concentration impurity regions which are formed so as to sandwich a channel region, and a pair of pseudo LDD regions, each being formed by introducing impurities between the corresponding one of the high concentration impurity regions and said channel region;    a first gate insulating film formed on the channel region of said first semiconductor film and said pair of pseudo LDD regions; and    a first gate electrode formed on said first gate insulating film,    said second thin film transistor including:    a second semiconductor film having a pair of high concentration impurity regions formed so as to sandwich a channel region, and a pair of low concentration impurity regions, each having a impurity concentration lower than that of said pseudo LDD region of said first thin film transistor arranged between these impurity regions and said channel region;    a second gate insulating film formed on said channel region and said low concentration impurity region of said second semiconductor film so as to be thicker than said first gate insulating film; and    a second gate electrode formed on said second gate insulating film.    
     
     
         13 . The thin film transistor device according to  claim 12 , wherein 
 said first gate insulating film is formed of an one-layered first insulating film; and    said second gate insulating film is constituted by laminating said first insulating film and a second insulating film thicker than said first insulating film.    
     
     
         14 - 16 . (Cancelled)  
     
     
         17 . A method of manufacturing a thin film transistor device, comprising: 
 a step for forming a semiconductor film on a substrate, patterning said semiconductor film to form a first semiconductor film in a low-voltage driven thin film transistor formation region and a second semiconductor film in a high-voltage driven thin film transistor formation region;    a step for forming a first insulating film only on the second semiconductor film of said first and second semiconductor films;    a step for forming a second insulating film on the entire surface of the resultant structure above said substrate;    a step for forming a conductive film on said second insulating film;    a step for forming a first mask pattern on said conductive film above said first semiconductor film, and forming a second mask pattern on said conductive film above said second semiconductor film;    a step for side-etching said conductive film using said first and second mask patterns as a mask, and forming first and second gate electrodes having widths smaller than those of said first and second mask patterns;    a step for etching said first and second insulating films anisotropically using said first and second mask patterns as a mask to form a first gate insulating film on said first semiconductor film and a second gate insulating film on said second semiconductor film;    a step for removing said mask patterns; and    a step for ion-implanting impurities into both sides of said first gate electrode of said first semiconductor film to form a pair of high concentration impurity regions, ion-implanting impurities into both sides of said second gate electrode of said second semiconductor film to form a pair of high concentration impurity regions, and ion-implanting impurities into said second semiconductor film using said second gate electrode as a mask, under conditions that the impurities pass through said second gate insulating film, thus forming a pair of low concentration impurity regions on both sides of said second gate electrode.    
     
     
         18 . The method of manufacturing a thin film transistor device according to  claim 17 , wherein said first insulating film is formed to be thicker than said second insulating film.  
     
     
         19 . The method of manufacturing a thin film transistor device according to  claim 17 , the method further comprising: 
 between the step for forming said first insulating film and the step for forming said second insulating film, a step for performing a plasma treatment for said first semiconductor film at a gas atmosphere containing oxygen; and    a step for treating said first semiconductor film with a solution containing hydrofluoric acid.    
     
     
         20 . A thin film transistor device, comprising: 
 a high-voltage driven thin film transistor and a low-voltage driven thin film transistor, which are formed on a substrate, wherein    a gate electrode of said high-voltage driven thin film transistor by laminating first and second insulating films; and    a portion of a gate insulating film below a gate electrode of said low-voltage driven thin film transistor, where an edge portion of a semiconductor film of said low-voltage driven thin film transistor and said gate electrode intersect, is constituted by laminating said first and second insulating films, and other portions thereof is constituted by said second insulating film alone.    
     
     
         21 . The thin film transistor device according to  claim 20 , wherein 
 in a semiconductor film of said high-voltage driven thin film transistor, a pair of high concentration impurity regions formed so as to sandwich a channel region and a pair of low concentration impurity regions, each being arranged between the corresponding one of the high concentration impurity regions and said channel region are formed; and    in a semiconductor film of said low-voltage driven thin film transistor, a pair of high concentration impurity regions alone arranged so as to sandwich a channel region are formed.    
     
     
         22 . A method of manufacturing a thin film transistor, comprising: 
 a step for forming a semiconductor film on a substrate, and patterning said semiconductor film to form a first semiconductor film in a low-voltage driven thin film transistor formation region and a second semiconductor film in a high-voltage driven thin film transistor formation region;    a step for forming a first insulating film on said first and second semiconductor films;    a step for removing by wet-etching said first insulating film on a central portion of said first semiconductor film;    a step for forming a second insulating film on the entire surface of the resultant structure above said substrate;    a step for forming a conductive film on said second insulating film;    a step for forming a resist pattern with a predetermined shape of a gate electrode on said conductive film;    a step for side-etching said conductive film using said resist pattern as a mask to form a first gate electrode above said first semiconductor film and a second gate electrode above said second semiconductor film;    a step for etching said first and second insulating films anisotropically using said resist pattern as a mask; and    an impurity injection step for injecting impurities into said first and second semiconductor films.    
     
     
         23 . The method of manufacturing a thin film transistor device according to  claim 22 , in said impurity injection step, a pair of high concentration impurity regions are formed in said low-voltage driven thin film transistor formation region by injecting impurities into said first semiconductor film on both sides of said first gate electrode, a pair of high concentration impurity regions are formed in said high-voltage driven thin film transistor formation region by injecting impurities into said second semiconductor film using the first and second insulating films remaining on the second semiconductor film as a mask, and low concentration impurity regions are formed by injecting impurities into said second semiconductor film under conditions that the impurities pass through said first and second insulating film, each of said low concentration impurity regions being disposed between the corresponding one of said second high concentration impurity regions and a channel region.  
     
     
         24 . A method of manufacturing a thin film transistor device, comprising: 
 a step for forming a semiconductor film on a substrate, and patterning said semiconductor film to form a first semiconductor film in a low-voltage driven thin film formation region and a second semiconductor film in a high-voltage driven thin film transistor;    a step for forming a first insulating film on said first and second semiconductor films;    a step for removing said first insulating film on a central portion of said first semiconductor film and on a region serving as high concentration impurity regions of said second semiconductor film by wet-etching;    a step for forming a second insulating film on the entire surface of the resultant structure above said substrate;    a step for forming a conductive film on said second insulating film;    a step for forming a resist pattern with a predetermined shape of a gate electrode on said conductive film;    a step for etching said conductive film using said resist pattern as a mask, thus forming a first gate electrode above said first semiconductor film and a second gate electrode above said second semiconductor film; and    an impurity injection step for injecting impurities into said first and second semiconductor films.    
     
     
         25 - 27 . (Cancelled)  
     
     
         28 . A method of manufacturing a thin film transistor device, comprising: 
 a step for forming a semiconductor film on a substrate, and patterning said semiconductor film, thus forming a first semiconductor film in a low-voltage driven thin film transistor formation region and a second semiconductor film in a high-voltage driven thin film transistor formation region;    a step for forming a first insulating film on said first and second semiconductor films;    a step for forming a first gate electrode on said first insulating film above said first semiconductor film;    a step for forming a second insulating film on the entire surface of the resultant structure above said substrate;    a step for forming a second gate electrode on said second insulating film above said second semiconductor film;    a step for etching said first and second insulating films, thus forming a first gate insulating film below said first gate electrode and a second gate insulating film below said second gate electrode, said second gate insulating film having a width larger than that of said second gate electrode; and    a step for forming a pair of high concentration impurity regions by injecting impurities into said first semiconductor film of both sides of said first gate electrode, and forming a pair of high concentration impurity regions by injecting impurities into said second semiconductor film of both sides of said second insulating film, and forming a pair of low concentration impurity regions by introducing impurities into said second semiconductor film on both sides of said second gate electrodes under conditions that the impurities pass through said second gate insulating film.    
     
     
         29 . A liquid crystal display apparatus, comprising: 
 the thin film transistor device according to any one of claims  1 ,  10 ;  12 ,  20  and  25 ; and    a liquid crystal cell formed on said substrate.