Wafer carrier having improved processing characteristics

Abstract

A wafer carrier for supporting a plurality of wafers, including a plurality of slots provided in a cradle, the cradle being formed of silicon carbide and having an oxide layer overlying the silicon carbide.

What is claimed is:  
     
         1 . A wafer carrier for supporting a plurality of wafers, comprising: 
 a plurality of slots provided in a cradle, the cradle comprising silicon carbide and having an oxide layer overlying the silicon carbide.    
     
     
         2 . The wafer carrier of  claim 1 , wherein the cradle comprises recrystallized silicon carbide.  
     
     
         3 . The wafer carrier of  claim 1 , wherein the cradle comprises silicon impregnated silicon carbide.  
     
     
         4 . The wafer carrier of  claim 1 , wherein the cradle comprises converted silicon carbide.  
     
     
         5 . The wafer carrier of  claim 1 , wherein the cradle comprises free-standing CVD SiC.  
     
     
         6 . The wafer carrier of  claim 1 , wherein the oxide layer comprises silicon oxide.  
     
     
         7 . The wafer carrier of  claim 6 , wherein the silicon oxide has a thickness greater than about 0.5 microns.  
     
     
         8 . The wafer carrier of  claim 6 , wherein the silicon oxide has a thickness greater than about 0.75 microns.  
     
     
         9 . The wafer carrier of  claim 6 , wherein the silicon oxide has a thickness greater than about 1.0 microns.  
     
     
         10 . The wafer carrier of  claim 6 , wherein the silicon oxide has a thickness greater than about 1.5 microns.  
     
     
         11 . The wafer carrier of  claim 1 , wherein the oxide layer is thermally grown.  
     
     
         12 . The wafer carrier of  claim 1 , wherein the oxide layer is deposited.  
     
     
         13 . The wafer carrier of  claim 1 , wherein the wafer carrier is a horizontal wafer carrier, for supporting wafers oriented in a generally upright, vertical position.  
     
     
         14 . The wafer carrier of  claim 1 , wherein slots are arranged in a linear array, and spaced apart from each other at a constant pitch.  
     
     
         15 . A wafer carrier for supporting a plurality of wafers, the wafers having a thickness t w , the wafer carrier comprising a plurality of slots for supporting the array of wafers, at least a portion of each slot having a slot width w s , wherein w s  is not less than about 1.30 t w .  
     
     
         16 . The wafer carrier of  claim 15 , wherein wherein w s  is not less than about 1.35 t w .  
     
     
         17 . The wafer carrier of  claim 15 , wherein w s  is within a range of about 1.35 t w  to about 1.50 t w .  
     
     
         18 . The wafer carrier of  claim 1 , wherein the cradle includes at least first, second and third support members, each of which is provided to support and contact the wafers, each slot having first, second and third slot segments extending respectively along the first, second and third support members.  
     
     
         19 . The wafer carrier of  claim 18 , wherein the first, second and third slot segments are positioned along an arc having a radius equal to a radius of the wafers, and the first, second, and third support members are positioned sequentially along the arc such that the second support member is positioned circumferentially between the first and third support members.  
     
     
         20 . The wafer carrier of  claim 19 , wherein said portion of each slot having a slot width w s  includes at least a portion of the second slot segment.  
     
     
         21 . The wafer carrier of  claim 19 , wherein the first, second and third slot segments are spaced along said arc which is not greater than 180 degrees.  
     
     
         22 . The wafer carrier of  claim 19 , wherein the first, second and third slot segments are spaced along said arc which is not greater than 150 degrees.  
     
     
         23 . A wafer carrier for supporting a plurality of wafers, the wafers having a radius r w , the wafer carrier comprising a plurality of slots for supporting the plurality of wafers, at least a portion of each slot having a radius of curvature r s , wherein r s  is not less than about 1.15 r w .  
     
     
         24 . The wafer carrier of  claim 23 , wherein r s  is not less than about 1.25 r w .  
     
     
         25 . The wafer carrier of  claim 23 , wherein r s  is not less than about 1.35 r w .  
     
     
         26 . The wafer carrier of  claim 23 , wherein r s  is not less than about 1.50 r w .  
     
     
         27 . The wafer carrier of  claim 23 , wherein r s  is infinity, said at least a portion of each slot extending along a straight line.  
     
     
         28 . A wafer carrier for supporting a plurality of wafers, the wafers having a radius r w , the wafer carrier comprising a plurality of slots for supporting the array of wafers, at least a portion of each slot having a radius of curvature r s , wherein r s  has a negative value and r w  has a positive value.  
     
     
         29 . A method for processing a plurality of wafers, comprising: 
 loading a plurality of wafers in a wafer carrier, the wafer carrier including a plurality of slots provided in a cradle, the cradle comprising silicon carbide and having an oxide layer overlying the silicon carbide; and    subjecting the wafers to a processing operation.    
     
     
         30 . The method of  claim 29 , wherein the processing operation comprises exposing the wafers to an oxidizing environment to oxidize the wafers.  
     
     
         31 . The method of  claim 29 , wherein the oxide layer is formed by oxidation at a temperature higher than a temperature of the processing operation.  
     
     
         32 . A method for processing a plurality of wafers, comprising: 
 loading a plurality of wafers in a wafer carrier, the wafers having a radius r w , the wafer carrier comprising a plurality of slots for supporting the plurality of wafers, at least a portion of each slot having a radius of curvature r s , wherein r, is not less than about 1.15 r w ; and    subjecting the wafers to a processing operation.    
     
     
         33 . A method for processing a plurality of wafers, comprising: 
 loading a plurality of wafers in a wafer carrier, the wafers having a thickness t w , the wafer carrier comprising a plurality of slots for supporting the array of wafers, at least a portion of each slot having a slot width w s , wherein w s  is not less than about 1.30 t w ; and    subjecting the wafers to a processing operation.    
     
     
         34 . A wafer carrier for supporting a plurality of wafers, the wafers having a thickness t w  and a radius r w , the wafer carrier comprising a plurality of slots for supporting the plurality of wafers, at least a portion of each slot having a slot width w s  and a radius of curvature r s , wherein w s  is not less than about 1.30 t w  and r s  is not less than 1.15 r w , the wafer carrier further comprising silicon carbide and an oxide layer overlying the silicon carbide.