Method of plating a semiconductor structure

Abstract

The present invention relates to a method and an apparatus for depositing a metal layer on a semiconductor structure. A semiconductor structure comprising at least one recess and at least one elevation is provided. The semiconductor structure is electroplated for depositing a layer of metal and for filling at least one recess with metal. The semiconductor structure is electropolished for preferentially removing the metal from at least one elevation, and chemical mechanical polishing is performed to remove a surplus of the metal from at least one elevation and for planarizing a surface of the semiconductor structure. The present invention advantageously allows the reduction of the demands on the chemical mechanical polishing process.

What is claimed:  
     
         1 . A method of forming a layer of metal on a semiconductor structure, comprising: 
 bringing an electrode into contact with an electrolyte;    bringing said semiconductor structure into contact with said electrolyte;    applying in a first time interval a first current flowing from said electrode through said electrolyte to said semiconductor structure, said first current having a first amperage comprising a plurality of first positive pulses and a plurality of first negative pulses, an integral of said first amperage over said first time interval having a first value greater than zero; and    applying in a second time interval a second current flowing from said electrode through said electrolyte to said semiconductor structure, said second current having a second amperage, an integral of said second amperage over said second time interval having a second value less than zero.    
     
     
         2 . The method of  claim 1 , wherein an absolute of said first value is greater than an absolute of said second value.  
     
     
         3 . The method of  claim 1 , wherein said second amperage comprises a plurality of second negative pulses.  
     
     
         4 . The method of  claim 3 , wherein said second amperage further comprises a plurality of second positive pulses.  
     
     
         5 . The method of  claim 4 , wherein each of said second negative pulses is followed by at least one of said plurality of second positive pulses.  
     
     
         6 . The method of  claim 4 , wherein said second negative pulses and said second positive pulses have a substantially rectangular shape.  
     
     
         7 . The method of  claim 1 , wherein said second amperage is substantially constant and less than zero.  
     
     
         8 . The method of  claim 1 , wherein said first positive pulses and said first negative pulses have a substantially rectangular shape.  
     
     
         9 . The method of  claim 1 , wherein each of said first positive pulses is followed by at least one of said first negative pulses.  
     
     
         10 . The method of  claim 1 , wherein said first amperage depends on time t substantially like A 1 ·sin(ω 1 ·t+φ 1 )+B 1 , wherein A 1  is a first amplitude, ω 1  is a first angular frequency, φ 1  is a first phase shift and B 1  is a first offset greater than zero.  
     
     
         11 . The method of  claim 10 , wherein an absolute of A 1  is greater than an absolute of B 1 .  
     
     
         12 . The method of  claim 1 , wherein said second amperage depends on time t substantially like A 2 ·sin(ω 2 ·t+φ 2 )+B 2 , wherein A 2  is a second amplitude, ω 2  is a angular frequency, φ 2  is a second phase shift and B 2  is a second offset less than zero.  
     
     
         13 . The method of  claim 12 , wherein an absolute of A 2  is substantially equal to an absolute of B 2 .  
     
     
         14 . The method of  claim 1 , wherein bringing said electrode and said semiconductor structure into contact with said electrolyte comprises at least partially immersing said electrode and said semiconductor structure into said electrolyte.  
     
     
         15 . The method of  claim 1 , further comprising depositing an electrically conductive seed layer.  
     
     
         16 . The method of  claim 15 , wherein depositing said electrically conductive seed layer comprises at least one of physical vapor deposition and chemical vapor deposition.  
     
     
         17 . The method of  claim 15 , wherein depositing said electrically conductive seed layer comprises electroless plating.  
     
     
         18 . The method of  claim 1 , further comprising chemical mechanical polishing said semiconductor structure.  
     
     
         19 . A method, comprising: 
 providing a semiconductor structure comprising at least one recess and at least one elevation;    electroplating said semiconductor structure for depositing a layer of metal on said semiconductor structure and for filling said at least one recess with said metal;    electropolishing said semiconductor structure for preferentially removing said metal from said at least one elevation; and    chemical mechanical polishing said semiconductor structure, said chemical mechanical polishing removing a surplus of said metal from said at least one elevation and planarizing a surface of said semiconductor structure.    
     
     
         20 . The method of  claim 19 , further comprising: 
 bringing an electrode into contact with an electrolyte;    bringing said semiconductor structure into contact with said electrolyte;    wherein said electroplating is performed by applying in a first time interval a first current flowing from said electrode through said electrolyte to said semiconductor structure, said first current having a first amperage, an integral of said first amperage over said first time interval having a first value greater than zero; and    wherein said electropolishing is performed by applying in a second time interval a second current flowing from said electrode through said electrolyte to said semiconductor structure, said second current having a second amperage, an integral of said second amperage over said second time interval having a second value less than zero.    
     
     
         21 . The method of  claim 20 , wherein bringing said electrode and said semiconductor structure into contact with said electrolyte comprises immersing said electrode and said semiconductor structure at least partially into said electrolyte.  
     
     
         22 . The method of  claim 20 , wherein an absolute of said first value is greater than an absolute of said second value.  
     
     
         23 . The method of  claim 22 , wherein said first time interval is longer than said second time interval.  
     
     
         24 . The method of  claim 20 , wherein said first amperage comprises a plurality of first positive pulses.  
     
     
         25 . The method of  claim 24 , wherein said first amperage further comprises a plurality of first negative pulses.  
     
     
         26 . The method of  claim 25 , wherein said first positive pulses and said first negative pulses have a substantially rectangular shape.  
     
     
         27 . The method of  claim 25 , wherein each of said first positive pulses is followed by at least one of said first negative pulses.  
     
     
         28 . The method of  claim 20 , wherein said second amperage comprises a plurality of second negative pulses.  
     
     
         29 . The method of  claim 28 , wherein said second amperage further comprises a plurality of second positive pulses.  
     
     
         30 . The method of  claim 29 , wherein said second negative pulses and said second positive pulses have a substantially rectangular shape.  
     
     
         31 . The method of  claim 20 , wherein said first amperage depends on time t substantially like A 1 ·sin(ω 1 ·t+φ 1 )+B 1 , wherein A 1  is a first amplitude, ω 1  is a first angular frequency, φ 1  is a first phase shift and B 1  is a first offset greater than zero.  
     
     
         32 . The method of  claim 31 , wherein an absolute of A 1  is substantially equal to an absolute of B 1 .  
     
     
         33 . The method of  claim 20 , wherein said second amperage depends on time t substantially like A 2 ·sin(ω 2 ·t+φ 2 )+B 2 , wherein A 2  is a second amplitude, ω 2  is a second angular frequency, φ 2  is a second phase shift and B 2  is a second offset less than zero.  
     
     
         34 . The method of  claim 33 , wherein an absolute of A 2  is substantially equal to an absolute of B 2 .  
     
     
         35 . The method of  claim 20 , wherein said first amperage is substantially constant and greater than zero.  
     
     
         36 . The method of  claim 20 , wherein said second amperage is substantially constant and less than zero.  
     
     
         37 . The method of  claim 19 , wherein said electroplating comprises: 
 bringing an electrode into contact with an electrolyte;    bringing said semiconductor structure into contact with said electrolyte; and    applying in a time interval a current flowing from said electrode through said electrolyte to said semiconductor structure, said current having an amperage, an integral of said amperage over said time interval having a value greater than zero.    
     
     
         38 . The method of  claim 19 , wherein said electropolishing comprises: 
 bringing an electrode into contact with an electrolyte;    bringing said semiconductor structure into contact with said electrolyte; and    applying in a time interval a current flowing from said electrode through said electrolyte to said semiconductor structure, said current having an amperage, an integral of said amperage over said time interval having a value less than zero.    
     
     
         39 . The method of  claim 20 , wherein said at least one recess comprises at least one of a via and a trench.  
     
     
         40 . The method of  claim 20 , further comprising depositing an electrically conductive seed layer.  
     
     
         41 . The method of  claim 40 , wherein depositing said seed layer comprises at least one of physical vapor deposition and chemical vapor deposition.  
     
     
         42 . The method of  claim 40 , wherein depositing said seed layer comprises electroless plating.  
     
     
         43 . The method of  claim 19 , further comprising a second electroplating of said semiconductor structure for increasing a thickness of said layer of said metal.  
     
     
         44 . The method of  claim 43 , wherein said second electroplating is performed after said electropolishing.  
     
     
         45 . The method of  claim 43 , further comprising a second electropolishing of said semiconductor structure.  
     
     
         46 . The method of  claim 45 , wherein said second electropolishing is performed after said second electroplating.  
     
     
         47 . A plating cell for depositing a layer of metal on a semiconductor structure, comprising: 
 a container being adapted to receive an electrolyte;    an electrode being provided at least partially within said container;    a substrate holder being adapted to receive said semiconductor structure and to provide electrical contact to said semiconductor structure, said substrate holder being at least partially provided within said container;    a power source being electrically connected to said electrode and to said substrate holder; and    a control unit being adapted to control said power source to apply in a first time interval a first current flowing from said electrode through said electrolyte to said semiconductor structure, said first current having a first amperage comprising a plurality of first positive pulses and a plurality of first negative pulses, an integral of said first amperage over said first time interval having a first value greater than zero, said control unit further being adapted to control said power source to apply in a second time interval a second current flowing from said electrode through said electrolyte to said semiconductor structure, said second current having a second amperage, an integral of said second amperage over said second time interval having a second value less than zero.