US2004183120A1PendingUtilityA1

Method for manufacturing nonvolatile semiconductor memory with narrow variation in threshold voltages of memory cells

Assignee: SHARP KKPriority: Nov 28, 2000Filed: Apr 1, 2004Published: Sep 23, 2004
Est. expiryNov 28, 2020(expired)· nominal 20-yr term from priority
H10D 64/01354H10D 64/035H10D 30/68H10B 99/00H10B 69/00
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Claims

Abstract

In a method for manufacturing a memory cell of a nonvolatile semiconductor memory, a floating gate, first insulating film and control gate are successively stacked on a tunnel oxide film formed on a substrate of the nonvolatile semiconductor memory. The control gate, the first insulating film and the floating gate are patterned in stripes. Subsequently, a damaged portion of the tunnel oxide film immediately below a sidewall of the floating gate is removed by isotropic etching. A second insulating film is deposited to cover the control gate, sidewalls of the first insulating film, the floating gate and the tunnel oxide film. Thereby, a variation in threshold voltages between memory cells is suppressed.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A method for manufacturing a nonvolatile semiconductor memory wherein memory cells each having a tunnel oxide film, a floating gate, a first insulating film and a control gate stacked in this order are formed in a matrix on a semiconductor substrate, the method comprising the steps of: 
 forming the tunnel oxide film on the semiconductor substrate;    forming a first conductive layer to be used as a material of the floating gate on the tunnel oxide film;    patterning the first conductive layer in stripes extending in one direction;    forming a source/drain region in a surface of the semiconductor substrate by using the first conductive layer as a mask;    forming the first insulating film or the first conductive layer;    forming a second conductive layer on the first insulating film;    forming the control gate in stripes composed of the second conductive layer, the first insulating film in stripes and the floating gate in a rectangular solid composed of the first conductive layer by etching with a mask in stripes extending a direction perpendicular to the first conductive layer;    removing a portion of the tunnel oxide film immediately below a sidewall of the floating gate by isotropical etching; and    depositing a second insulating film on the control gate, sidewalls of the first insulating film, the floating gate and the tunnel oxide film to be covered with the second insulating film.    
     
     
         2 . The method for manufacturing a nonvolatile semiconductor memory according to  claim 1 , wherein after the second insulating film is deposited, thermal oxidation is performed to oxidize the sidewall of the floating gate via the second insulating film.  
     
     
         3 . The method for manufacturing a nonvolatile semiconductor memory according to  claim 1 , wherein isotropic etching of the tunnel oxide film after formation of the floating gate is performed by wet etching using a fluorinated acid.  
     
     
         4 . The method for manufacturing a nonvolatile semiconductor memory according to  claim 1 , wherein the second insulating film is a silicon oxide film formed by chemical vapor deposition.

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