Shielded multi-conductor interconnect bus for MEMS

Abstract

A shielded multi-conductor interconnect bus for use in interconnecting MEM devices with control signal sources or the like and a method of fabricating a shielded multi-conductor interconnect bus are disclosed. In one embodiment, a shielded interconnect bus formed on a substrate ( 20 ) includes a plurality of electrically conductive lines ( 42 ) arranged in sets of one, two or more conductive lines between electrically conductive shield walls ( 46, 66 ). The electrically conductive lines ( 42 ) are surrounded by layers of dielectric material ( 30, 50 ). An electrically conductive shield ( 78 ) overlies the electrically conductive lines ( 42 ) and electrically conductive shield walls ( 46, 66 ).

What is claimed is:  
     
         1 . A method for making a shielded multi-conductor interconnect bus comprising the steps of: 
 removing portions of a first layer of dielectric material overlying and supported by at least a portion of a substrate to provide a plurality of parallel channels in the first layer of dielectric material;    depositing a first layer of electrically conductive material over the first layer of dielectric material, the first layer of electrically conductive material filling the channels formed in the first layer of dielectric material;    removing strips of the first layer of electrically conductive material to provide a plurality of electrically conductive lines on the first layer of dielectric material extending parallel with the channels formed in the first layer of dielectric material, wherein an upper surface of the first layer of dielectric material is exposed at the bottom of each strip;    depositing a second layer of dielectric material over the first layer of electrically conductive material, wherein the second layer of dielectric material fills the strips removed from the first layer of electrically conductive material;    removing portions of the second layer of dielectric material to provide a plurality of parallel channels in the second layer of dielectric material, the channels in the second layer of dielectric material being located to overlie the filled channels in the first layer of dielectric material and extending downward through the second layer of dielectric material to expose the first layer of electrically conductive material filling the channels in the first layer of dielectric material; and    depositing a second layer of electrically conductive material over the second layer of dielectric material, wherein the second layer of electrically conductive material fills the channels formed in the second layer of dielectric material.    
     
     
         2 . The method of  claim 1  wherein in said step of removing portions of a first layer of dielectric material, the substrate is comprised of silicon and the first dielectric layer comprises a dielectric stack layer covering an upper surface of the substrate comprising a lower layer of thermal oxide and an upper layer of silicon nitride.  
     
     
         3 . The method of  claim 2  wherein in said step of removing portions of a first layer of dielectric material, sufficient material is removed to provide channels in the first layer of dielectric material that extend vertically downward through the first layer of dielectric material to expose the upper surface of the substrate along at least a portion of each channel.  
     
     
         4 . The method of  claim 1  wherein in said steps of removing portions of a first layer of dielectric material and removing strips of the first layer of electrically conductive material, the portions are removed in a manner providing channels and strips arranged in a pattern wherein one of the channels is located between sets of the electrically conductive lines, each set of electrically conductive lines including at least one electrically conductive line.  
     
     
         5 . The method of  claim 1  wherein in said step of depositing a second layer of dielectric material, the dielectric material comprises one of silicon dioxide and silicate glass.  
     
     
         6 . The method of  claim 1  wherein in said step of depositing a first layer of electrically conductive material, the electrically conductive material comprises doped polysilicon.  
     
     
         7 . The method of claim I wherein in said step of depositing a second layer of electrically conductive material, the electrically conductive material comprises doped polysilicon.  
     
     
         8 . The method of  claim 1  wherein said step of depositing a second layer of electrically conductive material comprises the steps of: 
 depositing a lower layer of doped polysilicon;  
 depositing an intervening layer of sacrificial material;  
 removing the intervening layer of sacrificial material; and  
 depositing an upper layer of doped polysilicon.