Solid-state imaging device

Abstract

In each photosensitive cell, a photodiode 101 , a transfer gate 102 , a floating diffusion layer section 103 , an amplifier transistor 104 , and a reset transistor 105 are formed in one active region surrounded by a device isolation region. The floating diffusion layer section 103 included in one photosensitive cell is connected not to the amplifier transistor 104 included in that cell but to the gate of the amplifier transistor 104 included in another photosensitive cell adjacent to the one photosensitive cell in the column direction. A polysilicon wire 111 connects the transfer gates 102 arranged in the same row, and a polysilicon wire 112 connects the reset transistors 105 arranged in the same row. For connection in the row direction, only polysilicon wires are used.

What is claimed is:  
     
         1 . A solid-state imaging device which outputs an electrical signal in accordance with an intensity of a received optical signal, comprising; 
 a photosensitive region having photosensitive cells two-dimensionally arranged in row and column directions on a semiconductor substrate, each of the photosensitive cells including a photodiode for storing a signal electric charge obtained by performing optical-electrical conversion on received light, a transfer transistor for transferring the signal electric charge stored in the photodiode, a floating diffusion layer section for temporarily storing the transferred signal electric charge, an amplifier transistor for amplifying the signal electric charge stored in the floating diffusion layer section, and a reset transistor for resetting the signal electric charge stored in the floating diffusion layer section,    a power supply line commonly connected to drains of said amplifier transistors;    a vertical driver circuit for driving said transfer transistors arranged in a same row and said reset transistors arranged in another same row;    a plurality of vertical signal lines commonly connected to said amplifier transistors arranged in a same column;    a plurality of load transistors respectively connected to the vertical signal lines;    a noise suppression circuit for suppressing noise of signals output to the vertical signal lines;    a plurality of horizontal transistors arranged in the row direction and supplied with outputs from the noise suppression circuit; and    a horizontal driver circuit for sequentially and selectively causing the horizontal transistors to be operated so as to cause the outputs to be sequentially produced from the noise suppression circuit, wherein    in each photosensitive cell, the photodiode, the transfer transistor, the floating diffusion layer section, the amplifier transistor, and the reset transistor are formed in one active region surrounded by a device insulation region, and the floating diffusion layer section included in a given one of the photosensitive cells is connected to a gate of an amplifier transistor included in a photosensitive cell adjacent to the given photosensitive cell in the column direction.    
     
     
         2 . The solid-state imaging device according to  claim 1 , wherein 
 a plurality of first horizontal signal lines commonly connected to gate electrodes of said transfer transistors arranged in the same row and a plurality of second horizontal signal lines commonly connected to gate electrodes of said reset transistors arranged in the same row are made of a same material, and the floating diffusion layer section in a given one of the photosensitive cells is located between the first horizontal signal line connected to a gate electrode of the transfer transistor included in the same photosensitive cell and the second horizontal signal line connected to a gate electrode of the reset transistor included in the given photosensitive cell.    
     
     
         3 . The solid-state imaging device according to  claim 1 , wherein 
 a first contact hole is provided on the floating diffusion layer section so as to connect the floating diffusion layer section and a gate of the amplifier transistor, a second contact hole is provided on a common drain shared by the amplifier transistor and the reset transistor so as to connect the common drain to the power supply line, a third contact hole is provided on a source of the amplifier transistor so as to connect the source to a corresponding one of the vertical signal lines, a fourth contact hole is provided on a wiring area where the gate of the amplifier transistor is located so as to connect the floating diffusion layer section and the gate of the amplifier transistor, and the first contact hole, the second contact hole, the third contact hole, and the fourth contact hole are aligned approximately in a straight line.    
     
     
         4 . The solid-state imaging device according to  claim 1 , wherein 
 a first contact hole is provided on the floating diffusion layer section so as to connect the floating diffusion layer section and a gate of the amplifier transistor, a second contact hole is provided on a common drain shared by the amplifier transistor and the reset transistor so as to connect the common drain to the power supply line, a third contact hole is provided on a source of the amplifier transistor so as to connect the source of the amplifier transistor to a corresponding one of the vertical signal lines, and the first contact hole, the second contact hole, and the third contact hole are aligned approximately in a straight line.    
     
     
         5 . The solid-state imaging device according to  claim 1 , wherein 
 a signal line connecting the floating diffusion layer section and a gate of the amplifier transistor, the power supply line, and the vertical signal lines are formed in a same metal wire layer.    
     
     
         6 . The solid-state imaging device according to  claim 1 , wherein 
 the power supply line includes a plurality of vertical power supply lines commonly connected to drains of the amplifier transistors arranged on the same column, and    a signal line connecting a given one of said floating diffusion layer sections and a gate of a corresponding one of the amplifier transistors together is located between one of the vertical signal lines which is connected to the amplifier transistor included in one of the photosensitive cells which includes the given floating diffusion layer section and one of the vertical power supply lines which is connected to a drain of the corresponding amplifier transistor.    
     
     
         7 . The solid-state imaging device according to  claim 1 , wherein 
 all of the transistors included in each of the photosensitive cells are N-channel MOS transistors.