US2004164229A1PendingUtilityA1
Color filter configuration for a silicon wafer to be diced into photosensitive chips
Est. expiryMar 8, 2021(expired)· nominal 20-yr term from priority
H10F 39/8057H10F 39/8053H10F 39/024H10F 39/026
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Claims
Abstract
An architecture and manufacturing method for photosensitive chips, such as used in office equipment and digital cameras, involves creating grooves between chip areas in a wafer, and then placing a light-transmissive planar layer over the main surface of the wafer. The planar layer, which may be acrylic-based, creates a substantially planar surface over both the photosites in the chip areas and the grooves. The planar layer in turn supports one or more light-transmissive filtering layers. The arrangement avoids damage to the filtering layers when the wafer is diced along the grooves.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method of making photosensitive chips for use in an imaging apparatus, comprising the steps of:
providing an integrated circuit wafer, the wafer comprising a first chip area defined in a main surface of the wafer, the first chip area including structure related to a first photosite, and a groove defined in the wafer, the groove defining at least one edge of the first chip area; providing a light-transmissive planar layer over the main surface, the planar layer forming a planar surface substantially parallel with the main surface, the planar layer extending over the groove; and dicing the wafer along the groove.
2 . The method of claim 1 , the planar layer comprising acrylic.
3 . The method of claim 1 , further comprising the step of providing a filtering layer disposed over the planar layer.
4 . The method of claim 3 , the filtering layer extending over the first photosite and over the groove.
5 . The method of claim 3 , the filtering layer comprising acrylic.
6 . The method of claim 1 , further comprising the step of providing in the chip area a ridge defined on the main surface between the photosite and the groove.
7 . The method of claim 1 , further comprising the step of providing in the chip area a ridge defined on the main surface between the photosite and the groove.Join the waitlist — get patent alerts
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