US2004155325A1PendingUtilityA1

Die-in heat spreader microelectronic package

Assignee: INTEL CORPPriority: Oct 4, 2000Filed: Feb 9, 2004Published: Aug 12, 2004
Est. expiryOct 4, 2020(expired)· nominal 20-yr term from priority
H10W 99/00H10W 90/736H10W 90/734H10W 90/724H10W 90/00H10W 72/9413H10W 72/07331H10W 72/874H10W 72/354H10W 72/241H10W 72/0198H10W 72/073H10W 72/29H10W 70/682H10W 70/614H10W 70/099H10W 70/60H10W 46/607H10W 46/603H10W 74/117H10W 70/09H10W 40/10
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Claims

Abstract

Microelectronic packages including a microelectronic die disposed within a recess in a heat spreader and build-up layers of dielectric materials and conductive traces are then fabricated on the microelectronic die and the heat spreader to form the microelectronic package, and methods for the fabrication of the same, including methods to align the microelectronic die within the heat spreader. In another embodiment, a microelectronic die is disposed on a heat spreader which has a filler material disposed therearound and build-up layers of dielectric materials and conductive traces are then fabricated on the microelectronic die and the filler material to form the microelectronic package, and methods for the fabrication of the same, including methods to align the microelectronic die on the heat spreader.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A microelectronic package, comprising: 
 a heat spreader having a first surface, said heat spreader having at least one recess defined therein by at least one sidewall extending from said heat spreader first surface to a recess bottom surface;    at least one microelectronic die disposed within said at least one recess, said at least one microelectronic die having an active surface, a back surface, and at least one side; and    a thermally conductive material adhering said at least one microelectronic die back surface to said recess bottom surface.    
     
     
         2 . The microelectronic package of  claim 1 , further including build-up layers disposed on said microelectronic die active surface and said heat spreader first surface.  
     
     
         3 . The microelectronic package of  claim 2 , wherein said build-up layers comprise at least one dielectric layer abutting said at least one microelectronic die active surface and said heat spreader first surface and at least one conductive trace disposed on said at least one dielectric layer.  
     
     
         4 . The microelectronic package of  claim 3 , wherein said at least one dielectric layer is disposed within gaps between said at least one recess sidewall and said at least one microelectronic die side.  
     
     
         5 . The microelectronic package of  claim 1 , further including a filler material disposed in gaps between said at least one recess sidewall and said at least one microelectronic dice side.  
     
     
         6 . The microelectronic package of  claim 1 , wherein said thermally conductive material is selected from the group consisting of resin, epoxy, metal and metal alloys.  
     
     
         7 . The microelectronic package of  claim 1 , wherein said at least one recess sidewall is sloped.  
     
     
         8 . A microelectronic package, comprising: 
 a heat spreader having a first surface, said heat spreader having at least one recess defined therein by at least one sidewall extending from said heat spreader first surface to a recess bottom surface;    at least one microelectronic die disposed within said at least one recess, said at least one microelectronic die having an active surface, a back surface, and at least one side;    a first plurality of solder bumps disposed upon the microelectronic die back surface; and    a second plurality of solder bumps disposed in the heat spreader at least one recess, wherein the first plurality and the second plurality are each aligned such that the microelectronic die is aligned into a position within the at least one recess.    
     
     
         9 . The microelectronic package of  claim 8 , further including: 
 a wetting layer disposed between the first plurality of solder bumps and the microelectronic die back surface.    
     
     
         10 . The microelectronic package of  claim 8 , further including: 
 a wetting layer disposed between the second plurality of solder bumps and the recess bottom surface.    
     
     
         11 . A microelectronic package, comprising: 
 a heat spreader having a first surface, said heat spreader having at least one recess defined therein by at least one sidewall extending from said heat spreader first surface to a recess bottom surface;    at least one microelectronic die disposed within said at least one recess, said at least one microelectronic die having an active surface, a back surface, and at least one side; and    build-up layers disposed on said microelectronic die active surface and said heat spreader first surface, wherein said build-up layers comprise at least one dielectric layer abutting said at least one microelectronic die active surface and said heat spreader first surface and at least one conductive trace disposed on said at least one dielectric layer.    
     
     
         12 . The microelectronic package of  claim 11 , wherein said at least one dielectric layer is disposed within gaps between said at least one recess sidewall and said at least one microelectronic die side.  
     
     
         13 . The microelectronic package of  claim 11 , further including a filler material disposed in gaps between said at least one recess sidewall and said at least one microelectronic dice side.  
     
     
         14 . A method of fabricating a microelectronic package, comprising: 
 providing a heat spreader having a first surface, said heat spreader having at least one recess defined therein by at least one sidewall extending from said heat spreader first surface to a recess bottom surface;    disposing at least one microelectronic die within said at least one recess, said at least one microelectronic die having an active surface, a back surface, and at least one side; and    adhering said at least one microelectronic die back surface to said recess bottom surface.    
     
     
         15 . The method of  claim 14 , further including: 
 forming at least one dielectric material layer on at least a portion of said microelectronic die active surface and said heat spreader first surface;    forming at least one via through said at least one dielectric material layer to expose a portion of said microelectronic die active surface; and    forming at least one conductive trace on said at least one dielectric material layer which extends into said at least one via to electrically contact said microelectronic die active surface.    
     
     
         16 . The method of  claim 14 , further including disposing a filler material in gaps between said at least one recess sidewall and said at least one microelectronic die side.  
     
     
         17 . The method of  claim 14 , wherein adhering said at least one microelectronic die back surface to said recess bottom surface comprises adhering said at least one microelectronic die back surface to said bottom surface with a thermally conductive material selected from the group consisting of resin material filled with thermally conductive particulate material and epoxy material filled with thermally conductive particulate material.  
     
     
         18 . The method of  claim 14 , wherein adhering said at least one microelectronic die back surface to said recess bottom surface comprises adhering said at least one microelectronic die back surface to said bottom surface with a thermally conductive material selected from the group consisting of metal and metal alloys.  
     
     
         19 . The method of  claim 11 , wherein adhering said at least one microelectronic die back surface to said recess bottom surface comprises: 
 disposing a plurality of first solder bumps on said at least one microelectronic die back surface;    disposing a plurality of second solder bumps on said recess bottom surface; and    forming a substantially continuous solder layer between said at least one microelectronic die back surface to said recess bottom surface by reflowing said plurality of first solder bumps and said second plurality of solder bumps.    
     
     
         20 . A method of fabricating a microelectronic package, comprising: 
 providing a heat spreader having a first surface, said heat spreader having a plurality of recesses defined therein by a plurality of sidewalls extending from said heat spreader first surface to recess bottom surfaces of said plurality of recesses;    disposing at least one of a plurality of microelectronic dice within each of said plurality of recesses, each of said plurality of microelectronic dice having an active surface, a back surface, and at least one side;    adhering at least one of said plurality of microelectronic die back surfaces of said plurality of microelectronic dice to at least one corresponding recess bottom surface of said plurality of recesses; and    singulating said plurality of microelectronic dice by cutting through said heat spreader.    
     
     
         21 . The method of  claim 20 , further including: 
 forming at least one dielectric material layer on at least a portion of said microelectronic die active surface of said plurality of microelectronic dice and said heat spreader first surface;    forming at least one via through said at least one dielectric material layer to expose a portion of said microelectronic die active surfaces of said plurality of microelectronic dice; and    forming at least one conductive trace on said at least one dielectric material layer which extends into said at least one via to electrically contact at least one of said microelectronic die active surfaces of said plurality of microelectronic dice.    
     
     
         22 . The method of  claim 20 , wherein forming at least one dielectric material layer on at least a portion of said microelectronic die active surface of said plurality of microelectronic dice and said heat spreader first surface comprises flowing at least one dielectric layer into gaps between said at least one of said plurality of recess sidewalls and said at least one microelectronic dice side of said plurality of microelectronic dice.

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