US2004153583A1PendingUtilityA1
Serial communication device with dynamic allocation of acceptance masks using serial implementation
Priority: Sep 20, 2001Filed: Sep 20, 2001Published: Aug 5, 2004
Est. expirySep 20, 2021(expired)· nominal 20-yr term from priority
Inventors:James E. Bartling
H04L 49/90H04L 12/4135H04L 12/40032H04L 49/901H04L 2012/40215
44
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Claims
Abstract
A CAN module or a microcontroller comprises a CAN module which receives a serial bit stream. The CAN module comprises a filter register with a bit select input and a single bit output, a bit select unit for selecting a bit of the filter register in accordance with the serial bit stream, a comparator coupled with the single bit output and with the serial bit stream for generating a comparison signal, and a register receiving the comparison signal for accumulating a plurality of comparison results and for generating an acceptance signal.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A CAN module receiving a serial bit stream comprising:
a filter register having a bit select input and a single bit output; a bit select unit for selecting a bit of said filter register in accordance with said serial bit stream; a comparator coupled with said single bit output and with said serial bit stream for generating a comparison signal; a register receiving said comparison signal for accumulating a plurality of comparison results and for generating an acceptance signal.
2 . CAN module according to claim 1 , further comprising
a mask register having a bit select input and a single bit output; a mask unit receiving said mask single bit output and said comparison result and generating a result signal being fed to said register.
3 . CAN module according to claim 2 , further comprising
at least two mask register s having a bit select input and a single bit output; a multiplexer for selecting one of said mask register single bit output s .
4 . CAN module according to claim 3 , wherein said multiplexer comprises an input which is coupled with the single bit output of a further filter register.
5 . CAN module according to claim 3 , wherein said multiplexer comprises an input which is coupled with a constant signal indicating no mask function.
6 . CAN module according to claim 3 , wherein said multiplexer is controlled by at least one bit from said filter register.
7 . CAN module according to claim 6 , wherein said filter register comprises two additional bits to control said multiplexer.
8 . CAN module according to claim 1 , wherein said comparator is an EXCLUSIVE NOR gate.
9 . CAN module according to claim 1 , wherein said mask unit is a NOR gate.
10 . CAN module according to claim 1 , wherein said register is a D-Flip-Flop.
11 . A microcontroller comprising:
a central processing unit; a random access memory connected to said central processing unit; and a CAN module coupled with said central processing unit, wherein said CAN module comprises: a filter register having a bit select input and a single bit output; a bit select unit for selecting a bit of said filter register in accordance with said serial bit stream; a comparator coupled with said single bit output and with said serial bit stream for generating a comparison signal; a register receiving said comparison signal for accumulating a plurality of comparison results and for generating an acceptance signal.
12 . The microcontroller according to claim 11 , further comprising:
a mask register having a bit select input and a single bit output; a mask unit receiving said mask single bit output and said comparison result and generating a result signal being fed to said register.
13 . The microcontroller according to claim 12 , further comprising:
at least two mask registers having a bit select input and a single bit output; a multiplexer for selecting one of said mask register single bit outputs.
14 . The microcontroller according to claim 13 , wherein said multiplexer comprises an input which is coupled with the single bit output of a further filter register.
15 . The microcontroller according to claim 13 , wherein said multiplexer comprises an input which is coupled with a constant signal indicating no mask function.
16 . The microcontroller according to claim 13 , wherein said multiplexer is controlled by at least one bit from said filter register.
17 . The microcontroller according to claim 16 , wherein said filter register comprises two additional bits to control said multiplexer.
18 . The microcontroller according to claim 11 , wherein said comparator is an EXCLUSIVE NOR gate.
19 . The microcontroller according to claim 11 , wherein said mask unit is a NOR gate.
20 . The microcontroller according to claim 11 , wherein said register is a D-Flip-Flop.
21 . A method of operating a CAN module comprising the steps of:
receiving a data stream; generating an identifier and data out of said data stream; comparing said identifier with a filter value on a bit by bit base; generating an acceptance signal if said comparison is positive; storing associated data in a buffer upon generation of said acceptance signal.
22 . A method according to claim 21 , further comprising the step of masking said comparison result on a bit by bit base.
23 . A method according to claim 22 , further comprising the step selecting a mask value from a plurality of mask values.
24 . A method according to claim 23 , wherein said filter value provides additional data information for selecting said mask value.
25 . A method according to claim 23 , wherein said mask values is selected from a plurality of mask registers and filter registers.
26 . A method according to claim 23 , wherein one mask value provides a non-masking function.Join the waitlist — get patent alerts
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