Voltage controlled oscillators with selectable oscillation frequencies and methods for adjusting the same

Abstract

Voltage controlled oscillators include an amplifier that generates an oscillation output signal having an oscillation frequency based on an applied inductance and capacitance. An inductor coupled to the amplifier applies the inductance. A switched capacitor circuit includes a plurality of switches and capacitors selectably coupled to the amplifier through respective ones of the switches. A switched varactor circuit includes a plurality of switches and varactors selectably coupled to the amplifier through respective ones of the switches. The capacitances of the varactors are responsive to an applied control voltage. A control circuit is configured to select ones of the switches of the capacitor circuit and of the varactor circuit and to provide a selected control voltage to the varactor circuit to apply a desired capacitance to the amplifier.

What is claimed is:  
     
         1 . A voltage controlled oscillator comprising: 
 an amplifier that generates an oscillation output signal having an oscillation frequency based on an applied inductance and capacitance;    an inductor coupled to the amplifier that applies the inductance;    a switched capacitor circuit including a plurality of switches and capacitors selectably coupled to the amplifier through respective ones of the switches;    a switched varactor circuit including a plurality of switches and varactors selectably coupled to the amplifier through respective ones of the switches, the capacitances of the varactors being responsive to an applied control voltage; and    a control circuit that is configured to select ones of the switches of the switched capacitor circuit and of the switched varactor circuit and to provide a selected control voltage to the varactor circuit to apply a desired capacitance to the amplifier.    
     
     
         2 . The voltage controlled oscillator of  claim 1  wherein the control circuit is configured to select designated ones of the switches of the capacitor circuit and of the varactor circuit and to apply a designated control voltage to set the oscillation frequency while limiting a variation in gain of the amplifier across a range of oscillation frequencies.  
     
     
         3 . The voltage controlled oscillator of  claim 1  wherein the amplifier comprises a trans-conductance amplifier and wherein the oscillator further comprises a non-switched varactor coupled to the amplifier, wherein the non-switched varactor has a capacitance responsive to the control voltage.  
     
     
         4 . The voltage controlled oscillator of  claim 1  wherein the control circuit is configured to set the switches of the switched varactor circuit and the switched capacitor circuit substantially simultaneously to limit variations in a gain of the amplifier when changing the oscillation frequency.  
     
     
         5 . The voltage controlled oscillator of  claim 1  wherein the amplifier comprises a bipolar transistor or a field effect transistor.  
     
     
         6 . The voltage controlled oscillator of  claim 1  wherein the plurality of capacitors of the switched capacitor circuit, respectively, have capacitance values C SW , 2 1 C SW , . . . , and 2 (n−1) C SW , wherein C SW  is the capacitance value of a lowest capacitance one of the plurality of capacitors and wherein n is a number of capacitors in the plurality of capacitors of the switched capacitor circuit.  
     
     
         7 . The voltage controlled oscillator of  claim 1  wherein the plurality of varactors have capacitance values C V,SW , 2 1 C V,SW , . . . , and 2 n−1 C V,SW , where C V,SW  is the capacitance value of a lowest capacitance one of the plurality of varactors and wherein n is a number of varactors in the plurality of varactors.  
     
     
         8 . The voltage controlled oscillator of  claim 1  wherein the varactors have pn-junction diode structures.  
     
     
         9 . The voltage controlled oscillator of  claim 1  wherein the control circuit is configured to switch on and/or off the switches of the switched varactor circuit such that the capacitances of the varactors of the switched varactor unit connected to switched ones of the switches of the switched varactor circuit satisfy the following equation:  
         C   v,k =( A   0   +k A   sw ) C   jo (1 +V   cnt /φ) −m    
       wherein k is a decimal value of a binary digital control signal for selecting ones of the plurality of switches of the switched varactor circuit, C v,k  is a sum of the capacitances of the varactors coupled through selected switches, A o  is a capacitance area of a non-switched varactor coupled to the amplifier, A sw  is a unit capacitance area of a switched varactor, V cnt  is the control voltage, C jo  is a capacitance value per a unit area of a varactor when an inverse bias voltage is 0, φ is a built-in potential and m is a coefficient that represents varactor characteristics; and 
 wherein the unit capacitance area of the switched varactor A sw  is selected to minimize the rate of variation in a gain of the oscillator based on following equations:  
           Q   =     -         (     1   +       C   d       C     v   ,   k           )     2     9         ,     R   =     -         27        (         C   d     +     C   sw         C     v   ,   k         )       +     2          (     1   +       C   d       C     v   ,   k           )     3         54         ,     
          S   =       R   +         Q   3     +     R   2           3       ,     T   =       R   -         Q   3     +     R   2           3       ,       where                 ST     =     -   Q       ,     
          a   =         (     S   +   T   +       (     1   3     )          (     1   +       C   d       C     v   ,   k           )         )     3     =         A   0     +       (     k   +   1     )          A   sw             A   0     +     k                   A   sw               ,     
            A   sw     =         A   0          (     a   -   1     )           k                   (     1   -   a     )       +   1                         
 where Cd is a load capacitance value that is parasitic on an output terminal of the oscillation output signal, k is a decimal value of a binary digital control signal for selecting ones of the plurality of switches of the switched varactor circuit, C v,k  is a sum of the capacitances of varactors coupled through selected ones of the switches, C sw  is a capacitance value of switched capacitors, A o  is a capacitance area of the non-switched varactor and A sw  is a unit capacitance area of a switched varactor.  
 
     
     
         10 . A phase-locked loop circuit including the voltage controlled oscillator of  claim 1 .  
     
     
         11 . A method of changing the oscillation frequency of a voltage controlled oscillator having an amplifier with an inductor, a switched capacitor circuit and a switched varactor unit coupled thereto that determine the oscillation frequency, the method comprising: 
 changing a capacitance of the switched varactor circuit as seen by the amplifier by selecting a desired control voltage input to the switched varactor unit that determines a capacitance of varactors included in the switched varactor circuit and by selecting ones of the varactors included in the switched varactor circuit to couple to the amplifier;    changing a capacitance of the switched capacitor circuit as seen by the amplifier by selecting ones of a plurality of capacitors included in the switched capacitor circuit to couple to the amplifier; and    generating from the amplifier an amplified oscillation signal having an oscillation frequency based on the changed capacitance of the switched varactor circuit and the changed capacitance of the switched capacitor circuit.    
     
     
         12 . The method of  claim 11  wherein changing the capacitances are selected by selecting designated ones of a plurality of switches of the capacitor circuit that couple the capacitors to the amplifier and a of switches of the varactor circuit that couple the varactors to the amplifier and applying a designated control voltage to set the oscillation frequency while limiting a variation in gain of the amplifier across a range of oscillation frequencies.  
     
     
         13 . The method of  claim 12  wherein changing the capacitances comprises setting the switches of the switched varactor circuit and the switched capacitor circuit substantially simultaneously to limit variations in a gain of the amplifier when changing the oscillation frequency.  
     
     
         14 . A voltage controlled oscillator comprising: 
 a trans-conductance amplifier that generates an amplified oscillation signal having oscillation frequency, which change in response to changes in input whole inductance and capacitance, and outputs the signal to an oscillation signal output terminal;    an inductor that supplies the whole inductance;    a non-switched varactor whose capacitance changes in accordance with a change in a control voltage applied to a control voltage input terminal, the capacitance of the non-switched varactor resulting in a change in the whole capacitance;    a switched capacitor unit that includes a plurality of digital switches controlled by a control circuit, and capacitors connected to the digital switches, respectively, the capacitances of the capacitors connected to the switched digital switches being adjusted to change the whole capacitance; and    a switched varactor unit that includes a plurality of digital switches, and varactors that are connected to the digital switches, respectively, and whose capacitances change in accordance with a change in the control voltage, the capacitances of the varactors connected to the switched digital switches being adjusted to change the whole capacitance.    
     
     
         15 . The voltage controlled oscillator of  claim 14 , wherein the trans-conductance amplifier comprises a bipolar transistor.  
     
     
         16 . The voltage controlled oscillator of  claim 14 , wherein the trans-conductance amplifier comprises a field effect transistor.  
     
     
         17 . The voltage controlled oscillator of  claim 14 , wherein the switched capacitor unit comprises the plurality of capacitors, the capacitances of which are assigned with binary weights to obtain capacitance values C SW , 2 1 C SW , . . . , and 2 (n−1) C SW , C SW  denoting the capacitance value of the lowest-rank capacitor.  
     
     
         18 . The voltage controlled oscillator of  claim 14 , wherein the switched varactor unit comprises the plurality of varactors, the capacitances of which are assigned with binary weights to obtain capacitance values C V,SW , 2 1 C V,SW , . . . , and 2 (n−1) C V,SW , C V,SW  denoting the capacitance value of the lowest-rank varactor.  
     
     
         19 . The voltage controlled oscillator of  claim 18 , wherein the varactors included in the switched varactor unit are means that change in accordance with a change in the control voltage.  
     
     
         20 . The voltage controlled oscillator of  claim 18 , wherein the varactors included in the switched varactor unit have pn-unction diode structures such that their capacitances change in accordance with a change in the control voltage.  
     
     
         21 . The voltage controlled oscillator of  claim 14 , wherein the control circuit switches on or off the digital switches such that the whole capacitance is adjusted to minimize the rate of variation in a gain of the oscillator.  
     
     
         22 . The voltage controlled oscillator of  claim 21 , wherein switching on or off of the digital switches is controlled such that the capacitances of the varactors of the switched varactor unit connected to switched digital switches satisfy the following equation:  
         C   v,k =( A   0   +k A   sw ) C   jo (1 +V   cnt /φ) −m    
       wherein k denotes a decimal value of a binary digital control signal value, C v,k  denotes a sum of the capacitances of the varactors connected to switched digital switches, A o  denotes a capacitance area of a non-switched varactor, A sw  denotes a unit capacitance area of a switched varactor, V cnt  denotes an input control voltage, C jo  denotes a capacitance value per a unit area of a varactor when an inverse bias voltage is 0, φ denotes a built-in potential, and m denotes a coefficient that represents varactor characteristics, 
 wherein the unit capacitance area of the switched varactor A sw  is computed to minimize the rate of variation in a gain of the oscillator using the following equations:  
           Q   =     -         (     1   +       C   d       C     v   ,   k           )     2     9         ,     R   =     -         27        (         C   d     +     C   sw         C     v   ,   k         )       +     2          (     1   +       C   d       C     v   ,   k           )     3         54         ,     
          S   =       R   +         Q   3     +     R   2           3       ,     T   =       R   -         Q   3     +     R   2           3       ,       where                 ST     =     -   Q       ,     
          a   =         (     S   +   T   +       (     1   3     )          (     1   +       C   d       C     v   ,   k           )         )     3     =         A   0     +       (     k   +   1     )          A   sw             A   0     +     k                   A   sw               ,     
            A   sw     =         A   0          (     a   -   1     )           k                   (     1   -   a     )       +   1                         
 where Cd denotes a load capacitance value that is parasitic on an oscillation signal output terminal, k denotes a decimal value of a binary digital control signal value, C v,k  denotes a sum of the capacitances of varactors connected to switched digital switches, C sw  denotes a capacitance value of switched capacitors, A o  denotes a capacitance area of a non-switched varactor, and A sw  denotes a unit capacitance area of a switched varactor.  
 
     
     
         23 . A method of operating a voltage controlled oscillator, comprising: 
 supplying a whole inductance using an inductor included in the oscillator;    changing the whole capacitance of the oscillator by controlling the capacitance of a varactor unit included in the oscillator in accordance with a change in a control voltage input to a control voltage input terminal;    changing the whole capacitance of the oscillator by controlling a sum of the capacitances of a plurality of capacitors of a switched capacitor unit connected to a plurality of switched digital switches, the plurality of digital switches being controlled by a control circuit;    changing the whole capacitance of the oscillator by controlling a sum of the capacitances of a plurality of varactors of a switched varactor unit connected to the switched digital switches, the capacitances of the varactors changing in accordance with a change in the control voltage; and    generating an amplified oscillation signal having oscillation frequency, which change in response to changes in the input whole inductance and capacitance, using a trans-conductance amplifier included in the oscillator, and outputting the signal to an oscillation signal output terminal.    
     
     
         24 . The method of  claim 23 , wherein the trans-conductance amplifier comprises a bipolar transistor.  
     
     
         25 . The method of  claim 23 , wherein the trans-conductance amplifier comprises a field effect transistor.  
     
     
         26 . The method of  claim 23 , wherein the switched capacitor unit comprises the plurality of capacitors, the capacitances of which are assigned with binary weights to obtain capacitance values C SW , 2 1 C SW , . . . , and 2 (n−1) C SW , C SW  denoting the capacitance value of the lowest-rank capacitor.  
     
     
         27 . The method of  claim 23 , wherein the switched varactor unit comprises the plurality of varactors, the capacitances of which are assigned with binary weights to obtain capacitance values C V,SW , 2 1 C V,SW , . . . , and 2 (n−1) C V,SW , C V,SW  denoting the capacitance value of the lowest-rank varactor.  
     
     
         28 . The method of  claim 23 , wherein the varactors included in the switched varactor unit are means that change in accordance with a change in the control voltage.  
     
     
         29 . The method of  claim 23 , wherein the varactors included in switched varactor unit have pn-junction diode structures such that their capacitances change in accordance with a change in the control voltage.  
     
     
         30 . The method of  claim 23 , wherein the control circuit switches on or off the digital switches such that the whole capacitance is controlled to minimize the rate of variation in a gain of the oscillator.  
     
     
         31 . The method of  claim 23 , wherein switching on or off of the digital switches is controlled such that the capacitances of the varactors of the switched varactor unit connected to switched digital switches satisfy the following equation:  
         C   v,k =( A   0   +k A   sw ) C   jo (1 +V   cnt /φ) −m    
       wherein k denotes a decimal value of a binary digital control signal value, C v,k  denotes a sum of the capacitances of the varactors connected to switched digital switches, A o  denotes a capacitance area of a non-switched varactor, A sw  denotes a unit capacitance area of a switched varactor, V cnt  denotes an input control voltage, C jo  denotes a capacitance value per a unit area of a varactor when an inverse bias voltage is 0, φ denotes a built-in potential, and m denotes a coefficient that represents varactor characteristics, 
 wherein the unit capacitance area of the switched varactor A sw  is computed to minimize the rate of variation in a gain of the oscillator using the following equations:  
           Q   =     -         (     1   +       C   d       C     v   ,   k           )     2     9         ,     R   =     -         27        (         C   d     +     C   sw         C     v   ,   k         )       +     2          (     1   +       C   d       C     v   ,   k           )     3         54         ,     
          S   =       R   +         Q   3     +     R   2           3       ,     T   =       R   -         Q   3     +     R   2           3       ,       where                 ST     =     -   Q       ,     
          a   =         (     S   +   T   +       (     1   3     )          (     1   +       C   d       C     v   ,   k           )         )     3     =         A   0     +       (     k   +   1     )          A   sw             A   0     +     k                   A   sw               ,     
            A   sw     =         A   0          (     a   -   1     )           k                   (     1   -   a     )       +   1                         
 where Cd denotes a load capacitance value that is parasitic on an oscillation signal output terminal, k denotes a decimal value of a binary digital control signal value, C v,k  denotes a sum of the capacitances of varactors connected to switched digital switches, C s,w  denotes a capacitance value of switched capacitors, A o  denotes a capacitance area of a non-switched varactor, and A sw  denotes a unit capacitance area of a switched varactor.