Integrated circuit signal generator and a method for generating an analog output signal representative of a waveform

Abstract

A signal generator ( 1 ) for generating a square waveform analog voltage output signal comprises an on-chip DAC ( 12 ) which outputs the analog voltage signal on an output terminal ( 5 ). On-chip first and second programmable registers ( 9,10 ) store first and second digital words which correspond to the maximum and minimum voltage values of the analog output signal. An on-chip switch circuit ( 15 ) selectively and alternately switches the first and second registers ( 9,10 ) to an on-chip DAC register ( 17 ) from which the respective first and second digital words are loaded into the DAC ( 12 ) in response to a load DAC signal generated by a control circuit ( 14 ). The load DAC signal is generated in response to an externally generated LDAC signal in the form of a clock signal which is applied to an LDAC terminal ( 22 ). A flip-flop ( 19 ) in response to the load DAC signal outputs a control signal on a control line ( 25 ) for alternately switching the first and second registers ( 9,10 ) to the DAC register ( 17 ). The frequency of the analog output signal is determined by the frequency of the LDAC signal, and is half the frequency of the LDAC signal.

1 . An integrated circuit signal generator for generating an analog output signal representative of a square waveform, the signal generator comprising: 
 an on-chip DAC having an analog output for outputting the analog output signal representative of the square waveform,    an on-chip storing circuit for storing a first digital word and a second digital word corresponding respectively to a maximum analog value and a minimum analog value of the analog output signal, and    an on-chip control circuit for selectively and alternately loading the first and second digital words into the DAC for producing the analog output signal representative of the square waveform.    
     
     
         2 . An integrated circuit signal generator as claimed in  claim 1  in which the control circuit is responsive to an externally generated signal for loading the first and second digital words into the DAC.  
     
     
         3 . An integrated circuit signal generator as claimed in  claim 2  in which the frequency of the analog output signal is determined by the frequency of the externally generated signal.  
     
     
         4 . An integrated circuit signal generator as claimed in  claim 1  in which an on-chip signal generating circuit is provided for generating an on-chip generated signal, the control circuit being responsive to the on-chip generated signal for loading the first and second digital words into the DAC.  
     
     
         5 . An integrated circuit signal generator as claimed in  claim 4  in which the on-chip signal generating circuit is programmable for selecting the frequency of the analog output signal.  
     
     
         6 . An integrated circuit signal generator as claimed in  claim 1  in which the storing circuit is programmable for facilitating writing of the first and second digital words corresponding to desired analog maximum and minimum values of the analog output signal.  
     
     
         7 . An integrated circuit signal generator as claimed in  claim 1  in which the storing circuit comprises an on-chip first digital word storing register for storing the first digital word, and an on-chip second digital word storing register for storing the second digital word.  
     
     
         8 . An integrated circuit signal generator as claimed in  claim 7  in which an on-chip switch circuit is provided for selectively and alternately switching the first and second digital word storing registers to the DAC.  
     
     
         9 . An integrated circuit signal generator as claimed in  claim 8  in which the control circuit outputs a load DAC signal for loading the digital word from the one of the first and second digital word storing registers switched to the DAC, and the switch circuit is responsive to a control signal derived from the load DAC signal for selectively switching the first and second digital word storing registers to the DAC.  
     
     
         10 . An integrated circuit signal generator as claimed in  claim 9  in which an on-chip DAC register is provided for storing the selected one of the first and second digital words to be loaded into the DAC, the switch circuit being located for selectively and alternately switching the first and second digital word storing registers to the DAC register, and the DAC register is responsive to the load DAC signal for receiving the digital word from the one of the first and second digital word storing registers which is switched to the DAC register.  
     
     
         11 . An integrated circuit signal generator as claimed in  claim 2  in which an on-chip interface circuit is provided for receiving the externally generated signal to which the control circuit is responsive for selectively and alternately loading the first and second digital words into the DAC.  
     
     
         12 . An integrated circuit signal generator as claimed in  claim 1  in which the DAC is a voltage DAC and the analog output signal is a voltage signal representative of a voltage square waveform.  
     
     
         13 . An integrated circuit signal generator for generating an analog output signal representative of a step waveform, the signal generator comprising: 
 an on-chip DAC having an analog output for outputting the analog output signal representative of the step waveform,    an on-chip storing circuit for storing a plurality of digital words corresponding to analog step values of the analog output signal,    an on-chip control circuit for selectively and sequentially loading the digital words into the DAC for producing the analog output signal representative of the step waveform.    
     
     
         14 . An integrated circuit signal generator as claimed in  claim 13  in which the control circuit is responsive to an externally generated signal for loading the digital words into the DAC.  
     
     
         15 . An integrated circuit signal generator as claimed in  claim 14  in which the frequency of the analog output signal is determined by the frequency of the externally generated signal.  
     
     
         16 . An integrated circuit signal generator as claimed in  claim 13  in which an on-chip signal generating circuit is provided for generating an on-chip generated signal, the control circuit being responsive to the on-chip generated signal for loading the digital words into the DAC.  
     
     
         17 . An integrated circuit signal generator as claimed in  claim 16  in which the on-chip signal generating circuit is programmable for selecting the frequency of the analog output signal.  
     
     
         18 . An integrated circuit signal generator as claimed in  claim 13  in which the storing circuit is programmable for facilitating writing of digital words corresponding to desired analog step values of the analog output signal.  
     
     
         19 . An integrated circuit signal generator as claimed in  claim 13  in which the storing circuit comprises a plurality of on-chip digital word storing registers for storing the respective digital words corresponding to desired analog step values of the analog output voltage.  
     
     
         20 . An integrated circuit signal generator as claimed in  claim 19  in which an on-chip switch circuit is provided for selectively and sequentially switching the digital word storing registers to the DAC.  
     
     
         21 . An integrated circuit signal generator as claimed in  claim 20  in which the control circuit outputs a load DAC signal for loading the digital word from the one of the digital word storing registers switched to the DAC, and the switch circuit is responsive to control signals derived from the load DAC signal for selectively switching the digital word storing registers to the DAC.  
     
     
         22 . A method for generating an analog output signal representative of a square waveform in an integrated circuit, the method comprising the steps of: 
 providing an on-chip DAC on the integrated circuit,    storing a first digital word and a second digital word in an on-chip storing circuit of the integrated circuit, the first and second digital words corresponding respectively to a maximum analog value and a minimum analog value of the analog output signal, and    selectively and alternately loading the first and second digital words into the DAC for producing the analog signal representative of the square waveform on an analog output of the DAC.    
     
     
         23 . A method as claimed in  claim 22  in which the first and second digital words are loaded into the DAC in response to an externally generated signal generated externally of the integrated circuit.  
     
     
         24 . A method as claimed in  claim 23  in which the frequency of the analog output signal is determined by the frequency of the externally generated signal.  
     
     
         25 . A method as claimed in  claim 22  in which the first and second digital words are loaded into the DAC in response to an on-chip generated signal.  
     
     
         26 . A method for generating an analog output signal representative of a step waveform in an integrated circuit, the method comprising the steps of: 
 providing an on-chip DAC on the integrated circuit,    storing a plurality of digital words in an on-chip storing circuit of the integrated circuit, the digital words corresponding to respective analog step values of the analog output signal, and    selectively and sequentially loading the digital words into the DAC for producing the analog signal representative of the step waveform on an analog output of the DAC.    
     
     
         27 . A method as claimed in  claim 26  in which the digital words are loaded into the DAC in response to an externally generated signal generated externally of the integrated circuit.  
     
     
         28 . A method as claimed in  claim 27  in which the frequency of the analog output signal is determined by the frequency of the externally generated signal.  
     
     
         29 . A method as claimed in  claim 26  in which the digital words are loaded into the DAC in response to an on-chip generated signal.