US2004137715A1PendingUtilityA1
Methods of manufacturing semiconductor devices
Priority: Dec 30, 2002Filed: Dec 23, 2003Published: Jul 15, 2004
Est. expiryDec 30, 2022(expired)· nominal 20-yr term from priority
Inventors:Ki Min Lee
H10W 20/092H10W 20/077H10D 64/011
40
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Claims
Abstract
Methods of manufacturing semiconductors are disclosed. One example method includes forming a trench through a dual damascene process, depositing a barrier metal layer on the overall surface, and depositing copper in the trench to form a copper line. The example method may also include performing a wet etching process to remove the top portion of the copper line, depositing a barrier layer on the etched copper line, and performing a planarization process to flatten the barrier layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for manufacturing a semiconductor device comprising:
forming a trench through a dual damascene process; depositing a barrier metal layer on an overall surface, the barrier metal layer preventing diffusion of copper; depositing copper in the trench to form a copper line; performing a wet etching process to remove a top portion of the copper line; depositing a barrier layer on the etched copper line; and performing a planarization process such as chemical mechanical polishing (CMP) or an etch back process to flatten the barrier layer.
2 . A method as defined by claim 1 , wherein the barrier layer is formed of SiN or SiC.
3 . A method as defined by claim 1 , wherein the copper is deposited by at least one of electroplating and chemical vapor deposition (CVD).
4 . A method as defined by claim 1 , wherein the wet etching is performed using hydrochloric acid, dilute sulfuric acid, or aqueous ammonia.Join the waitlist — get patent alerts
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