Integrated electronic microphone

Abstract

The present invention provides an integrated electronic microphone formed as part of a semiconductor device, and a manufacturing method therefor. The microphone is formed with a sensing electrode as part of a sensing membrane, and the sensing electrode is connected to the gate of a sensing transistor to provide an output. The microphone may be operated in constant bias or constant charge mode.

1 . A semiconductor device comprising a microphone formed in an integrated manner and comprising a sensing electrode formed as part of an acoustic pressure sensing membrane, and a counter electrode in the form of a perforated rigid back-plate membrane, wherein said sensing electrode is connected to the gate of a sensing transistor.  
     
     
         2 . A semiconductor device as claimed in  claim 1  wherein said device is operable in a constant bias mode.  
     
     
         3 . A semiconductor device as claimed in  claim 2  wherein the counter electrode is set to a bias voltage and wherein the potential of the sensing electrode and hence the gate potential of the sensing transistor vary in accordance with the acoustic pressure, and wherein the gate potential is biased in the conducting regime whereby variations in the gate voltage vary the output voltage of the sensing transistor.  
     
     
         4 . A semiconductor device as claimed in  claim 2  wherein the potential of the sensing electrode is fixed and an output current from the sensing electrode or the counter electrode and varying in response to acoustic pressure on the sensing membrane is taken as the output signal.  
     
     
         5 . A semiconductor device as claimed in claim wherein said device is operable in a constant charge mode by first charging the sensing electrode followed by setting the potential of the counter electrode to ground and biasing the sensing transistor to a conducting state.  
     
     
         6 . A semiconductor device as claimed in  claim 5  wherein the charging of the sensing electrode is by tunneling from a substrate.  
     
     
         7 . A semiconductor device as claimed in  claim 5  wherein the charging of the sensing electrode is by injection from the sensing transistor.  
     
     
         8 . A semiconductor device as claimed in  claim 1  wherein the sensing membrane is formed of a layer of an insulating material and a layer of a conducting material.  
     
     
         9 . A semiconductor device as claimed in  claim 8  wherein said insulating material comprises low stress silicon nitride, and wherein said conducting material comprises polysilicon.  
     
     
         10 . A semiconductor device as claimed in  claim 1  wherein said counter electrode is formed of a layer of a first conducting material and a layer of a second conducting material.  
     
     
         11 . A semiconductor device as claimed in  claim 10  wherein said second conducting material is a relatively hard material and is sandwiched between two layers of said first conducting material which is a relatively soft material.  
     
     
         12 . A semiconductor device as claimed in  claim 11  wherein said first material is aluminium and said second material is titanium.  
     
     
         13 . A method of forming an integrated semiconductor device including a microphone, comprising the steps of: 
 (a) depositing a first layer of an insulating material on a substrate to form a part of an acoustic sensing membrane,    (b) depositing a layer of conducting material on said layer of insulating material,    (c) depositing a second layer of an insulating material on said conducting material,    (d) depositing a sacrificial layer on said second layer of insulating material,    (e) depositing at least one rigid conducting material on said sacrificial layer to define a rigid counter electrode,    (f) forming a plurality of holes in said counter electrode,    (g) etching said substrate from a back side thereof to expose said membrane, and    (h) removing said sacrificial layer by etching through said holes to leave an airgap between said membrane and said counter electrode.    
     
     
         14 . A method as claimed in  claim 13  wherein before step (a) said substrate is subject to an isolation technique to separate on said substrate an area for said membrane, an area for a tunneling window, and areas for forming at least one sensing transistor and a substrate contact.  
     
     
         15 . A method as claimed in  claim 13  wherein the conducting layer of said membrane also forms the gate electrode(s) of at least one sensing transistor.  
     
     
         16 . A method as claimed in  claim 13  wherein said first insulating layer in step (a) is formed of low stress silicon nitride.  
     
     
         17 . A method as claimed in  claim 13  wherein the conducting layer of said membrane in step (b) is formed of polysilicon.  
     
     
         18 . A method as claimed in  claim 13  wherein the sacrificial layer of step (d) is formed of polysilicon.  
     
     
         19 . A method as claimed in  claim 13  wherein the counter electrode is formed of a hard conducting material sandwiched between two layers of a softer conducting material.  
     
     
         20 . A method as claimed in  claim 19  wherein said hard conducting material is titanium, and said softer conducting material is aluminium.  
     
     
         21 . A method of forming a semiconductor device including a membrane, comprising the steps of: 
 (a) depositing a membrane forming material on a substrate,    (b) depositing a sacrificial layer of polysilicon on said membrane forming material,    (c) constructing a further semiconductor device structure on said substrate and over said sacrificial layer,    (d) removing said sacrificial layer, and    (e) etching a back side of said substrate to expose said membrane.    
     
     
         22 . A method of forming a semiconductor device including a membrane, comprising the steps of: 
 (a) depositing a first membrane forming material on a substrate, said first membrane forming material being an insulating material,    (b) depositing a second membrane forming material on said first membrane forming material, said second membrane forming material being a conducting material and said second membrane forming material extending beyond said first membrane forming material so as to contact said substrate, whereby charges may be injected into said conducting material.    (c) depositing a sacrificial layer on said second membrane forming material,    (d) constructing a further semiconductor device structure on said substrate and over said sacrificial layer,    (e) removing said sacrificial layer, and    etching a back side of said substrate to expose said membrane.