Electronic apparatus having an adhesive layer from wafer level packaging

Abstract

Flip chip packages formed at a wafer level on semiconductor wafers for electronic systems provide convenient prepackaging. The package, in one embodiment, includes an adhesive layer applied to an active side of the wafer. The adhesive layer has openings to permit access to the conductive pads on each die. A conductive material substantially fills the openings. A pre-packaged die diced from the semiconductor wafer is mounted to a support wherein the conductive material effects electrical interconnection between the conductive pads on the die and receiving conductors on the support. The pre-packaged die can be coupled to a processor for an electronic system. To provide greater mounting densities, two or more dice may be coupled with the adhesive layer providing a covering for the two or more dice. The prepackaged chip with two or more dice may be coupled to a processor reducing the volume needed in an electronic system.

What is claimed is:  
     
         1 . A semiconductor wafer, comprising: 
 at least one die having a first side, the at least one die having an array of connection pads thereon, the connection pads electrically coupled to circuits on the at least one die; and    an adhesive layer covering the first side of the at least one die, the adhesive layer having an array of openings, where the array of openings are adapted to provide access to the array of connection pads.    
     
     
         2 . The semiconductor wafer of  claim 1 , further comprising a conductive material substantially filling the array of openings, the conductive material adapted to permit electrical interconnection through the adhesive layer to the circuits on the at least one die.  
     
     
         3 . The semiconductor wafer of  claim 2 , wherein the conductive material is solder.  
     
     
         4 . The semiconductor wafer of  claim 2 , wherein the conductive material is cylindrical in shape.  
     
     
         5 . The semiconductor wafer of  claim 2 , wherein the conductive material is sphere-shaped.  
     
     
         6 . The semiconductor wafer of  claim 1 , wherein the adhesive layer comprises one or more film layers.  
     
     
         7 . The semiconductor wafer of  claim 1 , wherein the adhesive layer substantially covers a face of the semiconductor wafer.  
     
     
         8 . A semiconductor wafer, comprising: 
 at least one die having a first side and a second side, the second side opposite the first side, the at least one die having an array of connection pads thereon, the connection pads electrically coupled to circuits on the at least one die;    an adhesive layer covering the first side of the at least one die, the adhesive layer having an array of openings, where the array of openings provides access to the array of connection pads;    a conductive material substantially filling the array of openings, the conductive material adapted to permit electrical interconnection through the adhesive layer to the array of connection pads; and    a protective coating on the second side of the at least one die.    
     
     
         9 . The semiconductor wafer of  claim 8 , wherein the adhesive layer substantially covers a face of the semiconductor wafer.  
     
     
         10 . The semiconductor wafer of  claim 8 , wherein the adhesive layer is comprised of one or more film layers.  
     
     
         11 . The semiconductor wafer of  claim 8 , wherein the adhesive layer comprises a curable, fluid material.  
     
     
         12 . The semiconductor wafer of  claim 8 , wherein the conductive material is solder.  
     
     
         13 . An electronic system comprising: 
 a processor; and    a pre-packaged flip chip coupled to the processor, wherein the flip chip includes: 
 a first semiconductor device having a first side and a second side, the first side having a first array of connection pads, the connection pads electrically coupled to circuits on the first semiconductor device;  
 a second semiconductor device having a first side comprising a second array of connection pads, wherein the second side of the first semiconductor device is coupled to the first side of the second semiconductor device such that the second array of connection pads is adjacent the first array of connection pads;  
 an adhesive layer covering the first side of the first semiconductor device and the first side of the second semiconductor device, the adhesive layer having an array of openings substantially aligned with one or more connection pads of either the first array of connection pads or the second array of connection pads; and  
 a conductive material substantially filling the array of openings.  
   
     
     
         14 . The electronic system of  claim 13 , wherein the adhesive layer is comprised of one or more film layers.  
     
     
         15 . The electronic system of  claim 13 , wherein the adhesive layer includes a curable, fluid material.  
     
     
         16 . The electronic system of  claim 13 , wherein the conductive material is solder.  
     
     
         17 . The electronic system of  claim 13 , wherein the conductive material is cylindrical in shape.  
     
     
         18 . The electronic system of  claim 13 , wherein the conductive material is sphere-shaped.  
     
     
         19 . An electronic system comprising: 
 a processor; and    a pre-packaged flip chip coupled to the processor, wherein the flip chip includes: 
 a first semiconductor device having a first side and a second side, the first side comprising a first array of connection pads, the connection pads electrically coupled to circuits on the first semiconductor device;  
 an adhesive layer covering the first side of the first semiconductor device, the adhesive layer having an array of openings substantially aligned with one or more connection pads of the first array of connection pads; and  
 a conductive material substantially filling the array of openings.  
   
     
     
         20 . The electronic system of  claim 19 , wherein second side of the first semiconductor is opposite the first side and includes a protective material substantially covering the second side.  
     
     
         21 . The electronic system of  claim 19 , wherein the adhesive layer is comprised of one or more film layers.  
     
     
         22 . The electronic system of  claim 19 , wherein the adhesive layer includes a curable, fluid material.  
     
     
         23 . The electronic system of  claim 19 , wherein the conductive material is solder.  
     
     
         24 . The electronic system of  claim 19 , wherein the conductive material is cylindrical in shape.  
     
     
         25 . The electronic system of  claim 19 , wherein the conductive material is sphere-shaped.  
     
     
         26 . An electronic system comprising: 
 a processor; and    a flip chip coupled to the processor, wherein the flip chip includes: 
 a die having an active side and a back side, the back side opposite the active side, the active side comprising an array of connection pads, the connection pads electrically coupled to circuits on the die;  
 an adhesive layer covering the active side of the die, the adhesive layer having an array of openings substantially aligned with one or more connection pads of the array of connection pads;  
 a conductive material substantially filling the array of openings;  
 a protective coating on the back side of the die; and  
 a support coupled to the die, the support having an array of conductors substantially aligned with the one or more connection pads of the array of connection pads.  
   
     
     
         27 . The electronic system of  claim 26 , wherein the adhesive layer is an elastomer.  
     
     
         28 . The electronic system of  claim 26 , wherein the adhesive layer is a thermoplastic material.  
     
     
         29 . The electronic system of  claim 26 , wherein the adhesive layer is a thermoset material.  
     
     
         30 . The electronic system of  claim 26 , wherein the adhesive layer is a pressure-sensitive material.  
     
     
         31 . The electronic system of  claim 26 , wherein the protective coating is an epoxy.  
     
     
         32 . An electronic system comprising: 
 a processor; and    a flip chip coupled to the processor, wherein the flip chip includes: 
 a first die having an active side and a back side, the active side of the first die having a first array of connection pads, the connection pads electrically coupled to circuits on the first die;  
 a second die having an active side and a back side, the active side of the second die having a second array of connection pads, wherein the back side of the first die is coupled to the active side of the second die such that the second array of connection pads are accessible and the first array of connection pads are accessible;  
 an adhesive layer covering the active side of the first die and the active side of the second die, the adhesive layer having an array of openings providing access with one or more connection pads of either the first array of connection pads or the second array of connection pads;  
 a conductive material substantially filling the array of openings; and  
 a protective coating on the back side of the second die.  
   
     
     
         33 . The electronic system of  claim 32 , wherein the conductive material is conductive paste or conductive gel that hardens upon curing.  
     
     
         34 . The electronic system of  claim 32 , wherein the adhesive layer includes a material that is applied as a fluid and hardens upon curing.  
     
     
         35 . The electronic system of  claim 32 , wherein the conductive material is column-shaped.  
     
     
         36 . The electronic system of  claim 32 , wherein the conductive material comprises one or more sphere-shaped objects.  
     
     
         37 . The electronic system of  claim 32 , wherein the back side of the first die includes a bonding layer.  
     
     
         38 . An electronic system comprising: 
 a processor; and    a flip chip coupled to the processor, wherein the flip chip includes: 
 a first die having a first side and a second side, the first side comprising a first array of connection pads, the connection pads electrically coupled to circuits on the first die;  
 a second die having a first side comprising a second array of connection pads, wherein the second side of the first die is coupled to the first side of the second die such that the second array of connection pads are accessible and the first array of connection pads are accessible;  
 an adhesive layer covering the first side of the first die and the first side of the second die, the adhesive layer having an array of openings substantially aligned with both the first array of connection pads and with the second array of connection pads, wherein the adhesive layer forms a mating surface adapted to attach to a support; and  
 a conductive material substantially filling the array of openings.  
   
     
     
         39 . The electronic system of  claim 38 , wherein each opening of the array of openings is chamfered at the mating surface.  
     
     
         40 . The electronic system of  claim 38 , wherein the conductive material is flush with the mating surface.  
     
     
         41 . The electronic system of  claim 38 , wherein the conductive material protrudes beyond the mating surface.  
     
     
         42 . The electronic system of  claim 38 , wherein the conductive material is recessed within the mating surface.  
     
     
         43 . The electronic system of  claim 38 , wherein the conductive material is column-shaped.  
     
     
         44 . The electronic system of  claim 38 , wherein the conductive material includes one or more sphere-shaped objects.  
     
     
         45 . An electronic system comprising: 
 a processor; and    a flip chip coupled to the processor, wherein the flip chip includes: 
 a first die having an active side and a back side, the active side of the first die having a first array of connection pads, the back side of the first die having a bonding layer, the connection pads electrically coupled to circuits on the first die;  
 a second die having an active side and a back side, the active side of the second die having a second array of connection pads, wherein the bonding layer of the back side of the first die is coupled to the active side of the second die such that the second array of connection pads are accessible and the first array of connection pads are accessible, wherein one or more connection pads of the second array are interconnected with one or more connection pads of the first array;  
 an adhesive layer covering for the active side of the first die and the active side of the second die, the adhesive layer having an array of openings substantially aligned with both the first array of connection pads and with the second array of connection pads, wherein the adhesive layer forms a mating surface; and  
 a conductive material substantially filling the array of openings; and a support to which the adhesive attaches.  
   
     
     
         46 . The electronic system of  claim 45 , wherein the conductive material is conductive paste or conductive gel that hardens upon curing.  
     
     
         47 . The electronic system of  claim 45 , wherein the adhesive layer includes a material that is applied as a fluid and hardens upon curing.  
     
     
         48 . The electronic system of  claim 45 , wherein the conductive material is recessed within the mating surface.  
     
     
         49 . The electronic system of  claim 45 , wherein the adhesive layer is a pressure-sensitive material.  
     
     
         50 . The electronic system of  claim 47 , wherein the flip chip includes three or more dice, each die having an active side such that the adhesive layer provides a covering for the active side of each die.