Methods of programming digital multistate phase change materials

Abstract

Non-binary methods of computing utilizing a digital multistate phase change material. Addition, subtraction, multiplication, and division are accomplished with the controlled application of energy to a phase change material. In one embodiment, energy in an amount insufficient to set the reset state of a phase change material is provided to store one or more numbers and further energy characteristic of the performance of a mathematical operation is provided to effect a computation. The set energy of the reset state of a phase change material provides an interval of energy that may be used to define programming states along the high resistance portion of the electrical resistance response curve of a phase change material. By sub-dividing this interval of energy, a plurality of programming states can be defined which are distinguishable in energy relative to the reset state. Numerical values can be assigned to the programming states and computations in non-binary arithmetic bases can be completed by providing energy to effect controlled transformations between programming states. In one embodiment, methods for computing with multidigit numbers are completed by storing separate digits in registers comprised of a phase change material, where each register corresponds to a particular place value. Memory groups comprised of registers can be defined where each memory group corresponds to the set of registers storing the digits of a multidigit number. Addition, subtraction, multiplication and division can be performed through selective register by register operations.

We claim:  
     
         1 . A method of programming a digital multi-state phase change material having a plurality of states, said states including: a reset state, a set state obtainable from said reset state by applying energy in an amount corresponding to the set energy of said reset state, said set state having lower resistance than said reset state, and one or more intermediate states having substantially the same resistance as said reset state, said one or more intermediate states being obtainable from said reset state by applying energy in an amount less than said set energy of said reset state, said method comprising the steps of: 
 establishing a programming strategy, said programming strategy comprising the defining of programming states for said phase change material, said defining of programming states including assigning data values to said programming states, said programming states being obtainable by applying programming energy characteristic of said data values to said reset state of said phase change material, said programming energy not exceeding said set energy of said reset state,    providing input data, said input data having a value; and    providing energy to said phase change material in an amount sufficient to transform said phase change material to the programming state associated with said input data value.    
     
     
         2 . The method of  claim 1 , wherein said input data is a number.  
     
     
         3 . The method of  claim 2 , wherein consecutive integer values are assigned to said programming states.  
     
     
         4 . The method of  claim 3 , where said consecutive integer values are assigned to said programming states in increasing order of said programming energy.  
     
     
         5 . The method of  claim 3 , wherein the smallest of said consecutive integer values is zero.  
     
     
         6 . The method of  claim 2 , wherein said programming states include said reset state.  
     
     
         7 . The method of  claim 6 , wherein the value zero is associated with said reset state.  
     
     
         8 . The method of  claim 2 , wherein said programming states include said set state.  
     
     
         9 . The method of  claim 8 , wherein the value zero is associated with said set state.  
     
     
         10 . The method of  claim 2 , wherein the number of programming states is equal to the base of the arithmetic system in which said number is expressed.  
     
     
         11 . The method of  claim 2 , wherein the number of programming states is equal to ten or a multiple of two.  
     
     
         12 . The method of  claim 1 , wherein said programming states are separated by uniform intervals of energy.  
     
     
         13 . The method of  claim 1 , wherein said providing of energy step is accomplished by providing energy in the form of an energy pulse.  
     
     
         14 . The method of  claim 1 , wherein said providing of energy step is accomplished by providing energy in the form of electrical energy.  
     
     
         15 . The method of  claim 14 , wherein said electrical energy is provided in the form of voltage.  
     
     
         16 . The method of  claim 14 , wherein said electrical energy is provided in the form of current.  
     
     
         17 . The method of  claim 1 , wherein said providing of energy step is accomplished by providing energy in the form of optical energy.  
     
     
         18 . The method of  claim 1 , wherein said providing of energy step is accomplished by providing energy in the form of thermal energy.  
     
     
         19 . The method of  claim 1 , wherein said phase change material is comprised of one or more elements selected from the group consisting of Te, Se, Ge, Sb, Bi, Pb, Sn, As, S, Si, P, O and mixtures or alloys thereof.  
     
     
         20 . The method of  claim 1 , wherein said phase change material comprises at least one chalcogen element and at least one transition metal element.  
     
     
         21 . The method of  claim 20 , wherein said at least one chalcogen is a mixture of both Te and Se.  
     
     
         22 . The method of  claim 20 , wherein said at least one transition metal element is selected from the group consisting of Cr, Fe, Ni, Nb, Pd, Pt and mixtures or alloys thereof.  
     
     
         23 . A method of resetting comprising the steps of: 
 providing a memory group having one or more registers, said registers comprising a digital multistate phase change material, said phase change material having a plurality of states, said states including: a reset state, a set state obtainable from said reset state by applying energy in an amount corresponding to the set energy of said reset state, said set state having lower resistance than said reset state, and one or more intermediate states having substantially the same resistance as said reset state, said one or more intermediate states being obtainable from said reset state by applying energy in an amount less than said set energy of said reset state;    providing a counting register comprised of said digital multistate phase change material, said counting register having a plurality of programming states, said programming states being obtainable from the reset state of said counting register by applying programming energy in an amount not exceeding the set energy of said reset state of said counting register, the number of said programming states being greater than or equal to the number of registers of said memory group not in said reset state;    assigning said counting register to said memory group, said assigning including designating a different one of said programming states for said registers of said memory group not in said reset state, whereby each of said registers of said memory group not in said reset state is associated with a different one of said designated programming states;    defining an initial programming state of said counting register, said initial programming state corresponding to the designated programming state having the smallest programming energy;    defining a final programming state of said counting register, said final programming state corresponding to the designated programming state having the highest programming energy;    initializing said counting register, said initializing including providing energy sufficient to transform said counting register to said initial programming state;    while said counting register is in a designated programming state other than said final programming state, iteratively performing the following steps a-c: 
 a. providing energy to the register of said memory group associated with the designated programming state of said counting register in an amount sufficient to transform said associated register of said memory group to its set state;  
 b. providing reset energy to said associated register of said memory group, said reset energy being sufficient to transform said associated register from its set state to its reset state;  
 c. incrementing said counting register, said incrementing including applying the minimum amount of energy necessary to transform said counting register to a different designated programming state;  
   providing energy to the register of said memory group associated with said final programming state of said counting register in an amount sufficient to transform said register of said memory group associated with said final programming state to its set state;    providing reset energy to said register of said memory group associated with said final programming state to transform said register of said memory group associated with said final programming state from its set state to its reset state.    
     
     
         24 . The method of  claim 23 , wherein said assigning step further includes designating a different one of said programming states for said registers of said memory group in said reset state, whereby each of said registers of said memory group is associated with a different one of said designated programming states.  
     
     
         25 . The method of  claim 23 , wherein said designated programming states are separated by a uniform interval of energy.  
     
     
         26 . The method of  claim 25 , wherein the set state of said counting register is separated from said final programming state of said counting register by said uniform interval of energy.  
     
     
         27 . The method of  claim 23 , wherein said final programming state is the set state of said counting register.  
     
     
         28 . The method of  claim 23 , wherein the number of programming states of said counting register is equal to the number of registers in said memory group.