System and method for resetting and initializing an alat to a known state at power on or through a machine specific state
Abstract
The present invention relates to a system and method for establishing an illegal system state for a table which is preferably fully associative to disable matching of prospective entries (entries to be written to the table) with entries already resident in the table. Preferably, disabling the matching of prospective and table entries forces a system for updating the fully associative table or array to employ a pointer system for writing prospective entries into the fully associative table. The illegal system may be invoked automatically upon powering up the system for updating the fully associative array or may be associated with a machine specific state effected upon issuing a specific command during program execution.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A method for preventing matching of prospective entries with table entries stored in a fully associative table, the method comprising the steps of:
writing illegal values to substantially all of said table entries in said fully associative table; and prohibiting said prospective entries from having said illegal values under normal program execution conditions, thereby preventing any matching conditions between said table entries and said prospective entries.
2 . The method of claim 1 wherein said writing step is performed during power up of a system.
3 . The method of claim 1 wherein said writing step is initiated by executing a specific machine specific instruction.
4 . The method of claim 1 wherein said writing step comprises the steps of:
setting at least one type bit to 1; and
setting all of a set of frame bits to 1.
5 . The method of claim 4 wherein said set of frame bits comprises three frame bits.
6 . The method of claim 1 wherein said fully associative table is included in a system for finding and validating a most recent advanced load instruction for a given check instruction.
7 . The method of claim 1 comprising the further step of:
updating entries in a fully associative table employing a pointer to indicate a first table location containing an invalid entry.
8 . The method of claim 1 comprising the further step of:
storing memory addresses in said fully associative table.
9 . The method of claim 1 comprising the further step of:
storing register numbers in said fully associative table.
10 . The method of claim 1 wherein said writing step comprises the step of:
issuing a force update command, thereby causing a plurality of presettable storage elements in said fully associative table to acquire a predetermined illegal value.
11 . A system for preventing matching of prospective entries with table entries stored in a fully associative table, the system comprising:
means for writing illegal values to substantially all of said table entries in said fully associative table; and means for prohibiting said prospective entries from having said illegal values, thereby preventing any matching conditions between said table entries and said prospective entries.
12 . The system of claim 11 wherein said writing means operates during power up of a system.
13 . The system of claim 11 wherein said writing means is activated by executing a specific machine specific instruction.
14 . The system of claim 11 , wherein said writing means comprises:
means for setting at least one type bit to 1; and means for setting all of a set of frame bits to 1.
15 . The system of claim 14 wherein said set of frame bits comprises three frame bits.
16 . The system of claim 11 wherein said fully associative table is included in a system for finding and validating a most recent advanced load instruction for a given check instruction.
17 . The system of claim 11 further comprising:
means for updating entries in a fully associative table employing a pointer to indicate a first table location containing an invalid entry.
18 . The system of claim 11 further comprising:
means for storing memory addresses in said fully associative table.
19 . A system for disabling matching of prospective entries with entries resident in an fully associative table, the system comprising:
a plurality of entry locations in said fully associative table; and a force update command for causing said plurality of entry locations to acquire predetermined bit values not present in prospective entries at ports connected to said fully associative table.
20 . The system of claim 19 wherein said predetermined bit values comprise:
a type bit having a value of 1; and
at least one frame bit having a value of 1.Join the waitlist — get patent alerts
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