Demodulator architecture and associated methods

Abstract

Embodiments of a frequency modulated (FM) demodulator and associated methods are generally described. According to but one example embodiment, an apparatus is disclosed comprising a receiver front-end, to receive a signal from one or more antenna(e) and generate quadrature components of the received signal, and a frequency-shifted, cross-multiplied differentiator demodulator, coupled with the receiver front-end, to generate a demodulated representation of the received signal centered at a select intermediate frequency.

What is claimed is:  
     
         1 . An apparatus comprising: 
 a receiver front-end, to receive a signal from one or more antenna and generate quadrature components of the received signal; and    a frequency-shifted, cross-multiplied differentiator demodulator, coupled with the receiver front-end, to generate a demodulated representation of the received signal centered at a select intermediate frequency.    
     
     
         2 . An apparatus according to  claim 1 , the demodulator comprising: 
 two parallel processing paths, one each for an in-phase and quadrature representation of the received signal, each path including, 
 a differentiator, to generate a differential of the in-phase or quadrature component of the received signal, respectively; and  
 a mixer, coupled with the differentiator, to mix the in-phase or quadrature component of the received signal with the quadrature or in-phase representation of the received signal, respectively.  
   
     
     
         3 . An apparatus according to  claim 2 , the demodulator comprising: 
 a frequency shifting network of passive electronic elements, the values of which determine a crossing point of the differentiators.    
     
     
         4 . An apparatus according to  claim 3 , the frequency shifting network comprising: 
 a resistor-capacitor filter element, coupling the I and Q processing branches, wherein the values of the one or more resistors and one or more capacitors of the filter element determine the crossing point of the demodulator.    
     
     
         5 . An apparatus according to  claim 3 , the demodulator further comprising: 
 a summing module, coupled with each of the two parallel processing paths, to subtract a result of the in-phase processing path from a result of the quadrature processing path.    
     
     
         6 . An apparatus according to  claim 1 , the receiver front-end comprising: 
 one or more antenna, to receive wireless signals; and    a quadrature downconverter, to generate an in-phase representation of the received signals and a quadrature representation of the received signals at a select intermediate frequency (IF).    
     
     
         7 . An apparatus according to  claim 6 , the quadrature downconverter comprising: 
 two processing paths, one each coupled to the one or more antenna, each processing path including, 
 a mixer, coupled to the antenna, to mix the received signal with a reference signal to downconvert the received signal to the select intermediate frequency, wherein the reference signal applied to the quadrature representation of the received signal is phase shifted from that applied to the in-phase representation of the received signal.  
   
     
     
         8 . An apparatus according to  claim 7 , each path of the quadrature downconverter further comprising: 
 a filter element, to filter out unwanted signal elements from the downconverted signal; and    an amplifier element, to increase a signal strength of the downconverted signal prior to demodulation of the signal.    
     
     
         9 . An apparatus according to  claim 1 , wherein the select intermediate frequency lies between baseband and a carrier frequency of the received signal.  
     
     
         10 . An apparatus according to  claim 1 , wherein the select intermediate frequency is a baseband frequency.  
     
     
         11 . An apparatus according to  claim 1 , wherein the apparatus is implemented within a single integrated circuit (IC).  
     
     
         12 . A wireless communication device comprising: 
 one or more antenna; and    an apparatus according to  claim 1 .    
     
     
         13 . A method comprising: 
 receiving a frequency modulated (FM) signal; and    generating a frequency shifted differential of each of an in-phase and quadrature representation of the received FM signal which, when selectively combined, reveals a modulating signal of the received FM signal.    
     
     
         14 . A method according to  claim 13 , the method further comprising: 
 splitting the received signal into two processing branches, an in-phase branch and a quadrature branch; and    mixing the signal in the in-phase branch with a reference signal, and the signal in the quadrature branch with a phase-shifted representation of the reference signal.    
     
     
         15 . A method according to  claim 14 , wherein the reference signal is associated with a select intermediate frequency (IF).  
     
     
         16 . A method according to  claim 13 , the element of generating a frequency shifted differential comprising: 
 shifting a center frequency of a differentiator generating the differential to a select IF;    computing a differential of each of the in-phase and quadrature representation of the received FM signal; and    multiplying the computed differential of the in-phase and quadrature representation of the received FM signal with the quadrature and in-phase representation of the received FM signal, respectively.    
     
     
         17 . A method according to  claim 16 , further comprising: 
 subtracting a product of the quadrature differential from a product of the in-phase differential to produce a demodulated representation of the received FM signal.    
     
     
         18 . A storage medium comprising content which, when executed, causes an accessing machine to implement a method according to  claim 13 .  
     
     
         19 . A storage medium comprising content which, when executed, causes an accessing machine to implement a frequency-shifted, cross multiplied differentiator detector to receive an in-phase and quadrature representation of a received FM signal and to generate a differential of each of the quadrature components centered at a select intermediate frequency, mix the generated differentials with an opposite quadrature component, and combine a result of the mixing to produce a demodulated representation of the received signal.  
     
     
         20 . A storage medium according to  claim 19 , the content to implement the frequency shifted, differentiator detector further comprising content to implement one or more multipliers, to multiply an in-phase representation of the received signal with a differential of a quadrature representation of the received signal, and to multiply a quadrature representation of the received signal with a differential of an in-phase representation of the received signal.  
     
     
         21 . A storage medium according to  claim 20 , the content to implement the frequency shifted, differentiator detector further comprising content to implement a summing module, to receive the products from the one or more multipliers and subtract a product of the quadrature differential from a product of the in-phase differential to produce a demodulated representation of a received FM signal.  
     
     
         22 . A storage medium according to  claim 19 , wherein the content is one or more of very high speed integrated circuit description language (VHDL), Verilog, SPICE netlist, or standard cell design language.