Method of making metallization and contact structures in an integrated circuit using a timed trench etch

Abstract

The invention concerns a method for forming metallization and contact structures in an integrated circuit. The method involoves the steps of etching a trench in the trench dielectric layer a trench dielectric layer of a composite structure containing a semiconductor substrate comprising an active region, a gate structure thereover, and dielectric spacers adjacent to the gate structure, a contact dielectric layer; and the trench dielectric layer; etching the contact dielectric layer under conditions which do not damage the gate structure to form a first contact opening that exposes a region of the semiconductor substrate; and depositing a conductive material into the contact opening and the trench.

1 . A method for forming metallization and contact structures in an integrated circuit comprising: 
 a) etching a trench dielectric layer of a composite structure comprising in sequential order: 
 i) a semiconductor substrate comprising an active region, a gate structure thereover, and dielectric spacers adjacent to said gate structure;  
 ii) a contact dielectric layer; and  
 iii) a trench dielectric layer; to form a trench in said trench dielectric layer under etch conditions which do not substantially etch said contact dielectric layer;  
   b) etching said contact dielectric layer under conditions which do not substantially etch said contact dielectric layer; substantially damage said gate structure to form a first contact opening that exposes a region of said semiconductor substrate and a portion of at least one of said dielectric spacers; and    c) depositing a conductive material into said contact opening and said trench.    
     
     
         2 . The method of  claim 1 , further comprising forming a second contact opening in said trench dielectric layer corresponding to said first contact opening.  
     
     
         3 . The method of  claim 2 , wherein during etching said contact dielectric layer, said composite structure comprises a dielectric contact opening mask.  
     
     
         4 . The method of  claim 2 , wherein during etching said contact dielectric layer, said composite structure further comprises a photoresist material.  
     
     
         5 . The method of  claim 2 , wherein said trench dielectric layer has a thickness at least  100  A greater than that of said trench.  
     
     
         6 . The mehtod of  claim 1 , wherein etching said contact dielectric layer is conducted under conditions providing an etch rate of at least 5:1 relative to that of said gate structure.  
     
     
         7 . The method of  claim 1 , further comprising forming a liner, wetting and/or barrier layer in said first contact opening and said trench.  
     
     
         8 . The mehtod of  claim 7 , wherein said liner, wetting and/or barrier layer has a thickness of from 50 Å to 1000 Å.  
     
     
         9 . The method of  claim 1 , wherein said liner, wetting and/or barrier layer comprises a material selected from the group consisting of titanium, zirconium, hafnium, tantalum, chromium, molybdenum, tungsten, copper, nickel, cobalt, ruthenium, rhodium, palladium, osmium, iridium, platinum, gold, silver, titanium-tungsten, tantalum nitride and titanium nitride.  
     
     
         10 . The method of  claim 1 , wherein said conductive material is selected from the group consisting of tungsten, aluminum, copper and alloys of one of said metals.  
     
     
         11 . The method of  claim 1 , furhter comprising removing said conductive material until its uppermost surface is substantially coplanar with an uppermost surface of said trench dielectric layer.  
     
     
         12 . The method of  claim 11 , further comprising depositing an interlayer dielectric layer over said coplanar conductive material and said trench dielectric layer.  
     
     
         13 . The method of  claim 1 , wherein said compostie structure further comprises an anti-reflective coating disposed between said trench dielectric layer and said patterned photoresist.  
     
     
         14 . The method of  claim 13 , wherein said anti-reflective coating comprises an organic anti-reflective coating.  
     
     
         15 . The method of  claim 13 , wherein said anti-reflective coating comprises a dielectric anti-reflective coating.  
     
     
         16 . The method of  claim 1 , wherein said trench dielectric layer comprises an undoped silicate glass layer.  
     
     
         17 . The method of  claim 1 , wherein said contact dielectric layer comprises a doped silicate glass.  
     
     
         18 . The method of  claim 17 , wherein said doped silicon oxide contact dielectric layer comprises a member selected fromt the group consisiting of a phosphosilicate glass, a borophosphosilicate glass and fluorosilicate glass.