Method for using thin spacers and oxidation in gate oxides

Abstract

A method for forming a lightly doped drain (LDD) field effect transistor uses very thin first sidewall spacers over the gate sidewalls, in which annealing/oxidation of the sidewall spacers results in (a) the rounding of corner portions of the gate structure sidewalls adjacent the gate oxide, and (b) a very low thermal consumption comprising a small portion of the total thermal budget. Secondary sidewall spacers of greater width are then formed to act as offsets in the introduction of N-type dopants into the substrate to form source and drain contact regions. The method may be varied to accommodate various design configurations and size scaling.

What is claimed is:  
     
         1 . A process for making a transistor comprising: 
 providing a substrate;    forming a dielectric layer on a portion of the substrate;    forming a gate structure on said dielectric layer having a gate oxide layer formed on said dielectric layer and a metal silicide layer formed on said gate oxide layer, said gate structure having a first sidewall and a second sidewall, said first sidewall and said second sidewall defining therebetween within said substrate a first contact region, a channel region and a second contact region; and    forming first, second, and third subregions within said second contact region, each subregion having a dopant concentration that differs from that of the other two subregions, said forming of said first, second, and third subregions comprising: 
 depositing a conformal layer of dielectric material over said substrate;  
 anisotropically etching said conformal layer of dielectric material, forming a layer of dielectric material on said first sidewall and said second sidewall;  
 subjecting said layer of dielectric material on said first sidewall and said second sidewall to an annealing/oxidation process;  
 forming a single layer sidewall spacer overlying said first sidewall and second sidewall;  
 introducing a first dopant into said substrate to form said first subregion;  
 forming another single layer sidewall spacer overlying said single layer sidewall spacer;  
 introducing a second dopant into said substrate to form said second subregion;  
 substantially removing said another single layer sidewall spacer; and  
 introducing a third dopant into said substrate to form said third subregion.  
   
     
     
         2 . The method of  claim 1 , wherein said single layer sidewall spacer comprises a layer having a thickness in the range of between about 50 and 150 Angstroms.  
     
     
         3 . The method of  claim 1 , wherein said another single layer sidewall spacer comprises a layer of material having a thickness in the range of about 2 to 20 times a thickness of said single layer sidewall spacer.  
     
     
         4 . The method of  claim 1 , wherein said another single layer sidewall spacer comprises a layer of material having a thickness of about 550 Angstroms.  
     
     
         5 . The method of  claim 1 , wherein said another single layer sidewall spacer comprises a material of one of silicon nitride and silicon dioxide.