US2004079987A1PendingUtilityA1

Nonvolatile semiconductor memory device and manufacturing method thereof

Assignee: MITSIBISHI DENKI KKPriority: Jul 25, 2001Filed: Oct 22, 2003Published: Apr 29, 2004
Est. expiryJul 25, 2021(expired)· nominal 20-yr term from priority
Inventors:Satoshi Shimizu
H10B 41/30H10B 69/00
37
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A non-volatile semiconductor memory device has, at a main surface of a semiconductor substrate, an uneven shape with recesses and protrusions repeated continuously and alternately and further includes a source diffusion layer region having a source region formed from an upper surface of each protrusion to the depth direction of the semiconductor substrate and a source diffusion layer interconnection formed from a bottom surface of the recess to the depth direction of the semiconductor substrate when the semiconductor substrate is viewed two-dimensionally. The depth of the bottom surface of the source region from the upper surface of the protrusion is made equal to or larger than the depth of the bottom surface of the recess from the upper surface of the protrusion. Thus, a non-volatile semiconductor memory device is provided which is suitable for miniaturization and in which resistance of the source diffusion layer region can easily be lowered.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A non-volatile semiconductor memory device having a source diffusion layer region formed continuously at a main surface of a semiconductor substrate, wherein 
 the main surface of said semiconductor substrate as said source diffusion layer region has, in a cross section parallel to a direction of extension of said source diffusion layer region, recesses and protrusions continuously and alternately repeated;    said source diffusion layer region includes 
 a first source diffusion layer region formed, when said semiconductor substrate is viewed two-dimensionally, from an upper surface of each said protrusion to depth direction of said semiconductor substrate, and  
 a second source diffusion layer region formed, when said semiconductor substrate is viewed two-dimensionally, from a bottom surface of said recess to the depth direction of said semiconductor substrate; and  
   depth of a bottom surface of said first source diffusion layer region from the upper surface of said protrusion is equal to or larger than depth of a bottom surface of each said recess from the upper surface of the protrusion.    
     
     
         2 . The non-volatile semiconductor memory device according to  claim 1 , wherein 
 in said first source diffusion layer region, impurity concentration distribution of a linear portion connecting lower ends of sidewalls forming each said protrusion has one peak between a mid point of the linear portion and one of the lower ends and another peak between the mid point and the other lower end.    
     
     
         3 . The non-volatile semiconductor memory device according to  claim 1 , wherein 
 in said first source diffusion layer region, impurity concentration distribution of a linear portion connecting lower ends of sidewalls forming each said protrusion has a peak near a mid point of the linear portion.    
     
     
         4 . The non-volatile semiconductor memory device according to  claim 1 , wherein the recesses and protrusions of the main surface of said semiconductor substrate are formed by trench isolation method.  
     
     
         5 . A method of manufacturing a non-volatile semiconductor memory device having a source diffusion layer region formed continuously at a main surface of a semiconductor substrate, comprising: 
 a first step of forming an isolation film on the main surface of said semiconductor substrate to form a plurality of element isolation regions parallel to each other;    a second step of removing the isolation film of those portions of said element isolating regions which are to be said source diffusion layer region so that the main surface of said semiconductor substrate comes to have recesses and protrusions; and    a third step of performing oblique ion implantation under such a condition that in a cross section parallel to a direction of extension of said source diffusion layer region, a mid point of a line connecting lower ends of sidewalls of each protrusion of said recesses and protrusions becomes a part of said source diffusion layer region.    
     
     
         6 . The method of manufacturing a non-volatile semiconductor memory device according to  claim 5 , wherein said third step includes the steps of: 
 implanting ions obliquely from above to the main surface of said semiconductor substrate at an angle not larger than an acuter one of angles formed by a line connecting a lower end of one sidewall of each recess of said recesses and protrusions to an upper end of opposing sidewall of said recess with a line vertical to the main surface of said semiconductor substrate, to form a part of said source diffusion layer region; and    implanting ions obliquely to the main surface of said semiconductor substrate with the same angle as the angle of said former ion implantation from a direction in line symmetry with said vertical line being an axis, to form remaining part of said source diffusion layer region.    
     
     
         7 . The method of manufacturing a non-volatile semiconductor memory device according to  claim 6 , further comprising the step of implanting ions approximately vertically to the main surface of said semiconductor substrate.  
     
     
         8 . The method of manufacturing a non-volatile semiconductor memory device according to  claim 5 , wherein 
 method of forming an isolation film in said first step is trench isolation method.

Join the waitlist — get patent alerts

Track US2004079987A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.