Method for manufacturing wiring substrates

Abstract

A method is provided for manufacturing a wiring substrate having via conductors. The method includes the steps of providing a substrate having via holes which open at a surface of the substrate, and completely immersing the substrate, together with an electrode, into an electroplating solution in such a manner that the substrate extends vertically. Bubbles are generated in the solution at a position below the substrate such that the generated bubbles rise along the surface of the substrate, from a lower end to an upper end thereof, while striking the surface. Electric current is caused to flow between the electrode and the substrate to thereby form via conductors in the via holes.

What is claimed:  
     
         1 . A method of manufacturing a wiring substrate including via conductors, said method comprising the steps of: 
 providing a substrate having via holes opening at a surface of the substrate;    immersing the substrate, together with an electrode, completely into an electroplating solution in such a manner that the substrate extends vertically;    generating bubbles at a position below the substrate such that the bubbles rise along the surface of the substrate, from a lower end thereof to an upper end thereof, while striking the surface of the substrate; and    producing electric current flow between the electrode and the substrate to thereby form via conductors in the via holes.    
     
     
         2 . A method of manufacturing a wiring substrate according to  claim 1 , wherein the via conductors are caused to assume the form of a filled via.  
     
     
         3 . A method of manufacturing a wiring substrate according to  claim 1 , wherein the substrate includes an underlying layer and a plating resist layer, said plating resist layer forming the substrate surface and having openings therein for exposure of the underlying layer; and 
 the via holes are formed in the underlying layer and exposed by the openings in the plating resist layer.    
     
     
         4 . A method of manufacturing a wiring substrate according to  claim 2 , wherein the substrate includes an underlying layer and a plating resist layer, said plating resist layer forming the substrate surface and having openings therein for exposure of the underlying layer; and 
 the via holes are formed in the underlying layer and exposed by the openings in the plating resist layer.