US2004061181A1PendingUtilityA1
Semiconductor device and mehtod of manufacturing the same
Est. expirySep 27, 2022(expired)· nominal 20-yr term from priority
Inventors:Hideki Satake
H10D 64/01346H10P 32/14H10D 64/01338H10P 10/00H10D 64/693
39
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Claims
Abstract
A semiconductor device is proposed which includes: a semiconductor substrate of a first conductivity type; a channel region formed at a surface of the semiconductor substrate; source and drain regions of a second conductivity type formed at both sides of the channel region in the semiconductor substrate; an insulating layer covering the channel region; and a gate electrode formed on the insulating layer, the insulating layer containing impurity atoms in such a manner that a concentration thereof is non-uniformly distributed along a surface parallel to the semiconductor substrate.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device comprising:
a semiconductor substrate of a first conductivity type; a channel region formed at a surface of the semiconductor substrate; source and drain regions of a second conductivity type formed at both sides of the channel region in the semiconductor substrate; an insulating layer covering the channel region; and a gate electrode formed on the insulating layer, the insulating layer containing impurity atoms in such a manner that a concentration thereof is non-uniformly distributed along a surface parallel to the semiconductor substrate.
2 . The semiconductor device according to claim 1 , wherein the impurity atoms are selected from the group consisting of B, C, N, F, P, S, Cl, As, Se, and Br.
3 . The semiconductor device according to claim 1 , wherein a highest concentration of the impurity atoms is equal to or a lowest concentration thereof or twice as large as the lowest concentration thereof.
4 . The semiconductor device according to claim 1 , wherein a highest concentration of the impurity atom is equal to or more than 10 19 cm −3 .
5 . A method of manufacturing a semiconductor device comprising:
forming an insulating layer on a semiconductor substrate of a first conductivity type; forming a conductive layer on the insulating layer; forming on the conductive layer a spotted layer including minute spots containing a resistive material resisting against ion implantation; non-uniformly implanting impurity ions to the conductive layer via the spotted layer containing the resistive material; and diffusing the impurity ions in the conductive layer into the insulating layer.
6 . The method of manufacturing a semiconductor device according to claim 5 , wherein the impurity ions are selected from the group consisting of B, C, N, F, P, S, Cl, As, Se and Br.
7 . The method of manufacturing a semiconductor device according to claim 5 , wherein the resistive material is a resist.
8 . The method of manufacturing a semiconductor device according to claim 6 , wherein the spotted layer is formed by applying the resist to the conductive layer, and spottedly leaving the resist on the conductive layer by performing etch back of the resist.
9 . The method of manufacturing a semiconductor device according to claim 5 , further comprising:
forming a gate oxide layer from the insulating layer; and forming a gate electrode from the conductive layer.
10 . A method of manufacturing a semiconductor substrate comprising:
forming an insulating layer on a semiconductor substrate of a first conductivity type; forming a conductive layer on the insulating layer; performing implantation of impurity ions several times so that an impurity concentration of the conductive layer becomes non-uniform due to implantation fluctuations; and diffusing the impurity ions in the conductive layer into the insulating layer.
11 . A method of manufacturing a semiconductor substrate comprising:
forming an insulating layer on a semiconductor substrate of a first conductivity type; forming a conductive layer on the insulating layer; forming minute concavity and convexity on a surface of the conductive layer by etching the conductive layer; performing ion implantation of impurity ions on the conductive layer having the concavity and convexity on the surface; and diffusing the impurity ions in the conductive layer into the insulating layer.
12 . The method of manufacturing a semiconductor substrate according to claim 11 , wherein the etching is chemical dry etching.
13 . The method of manufacturing a semiconductor substrate according to claim 11 , wherein the etching is wet etching.
14 . The method of manufacturing a semiconductor device according to claim 12 , wherein said impurity ions are selected from the group consisting of B, C, N, F, P, S, Cl, As, Se and Br.
15 . The method of manufacturing a semiconductor device according to claim 13 , wherein said impurity ions are selected from the group consisting of B, C, N, F, P, S, Cl, As, Se and Br.
16 . The method of manufacturing a semiconductor device according to claim 14 , further comprising:
forming a gate oxide layer from the insulating layer; and forming a gate electrode from the conductive layer.
17 . The method of manufacturing a semiconductor device according to claim 15 , further comprising:
forming a gate oxide layer from the insulating layer; and forming a gate electrode from the conductive layer.Join the waitlist — get patent alerts
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