US2004060169A1PendingUtilityA1

Bettery pack and method of manufacturing the same

Assignee: ROHM CO LTDPriority: Mar 29, 2000Filed: Sep 30, 2003Published: Apr 1, 2004
Est. expiryMar 29, 2020(expired)· nominal 20-yr term from priority
H01M 10/48Y02P70/50H05K 3/28H05K 2201/0999H05K 1/11H05K 3/244H01M 10/4257H04M 1/0262H05K 2201/099Y10T29/49115Y02E60/10Y10T29/49108
44
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Claims

Abstract

A battery pack includes a vessel 2, a battery mounted in the vessel 2 and a circuit board 3 connected to the battery. An opening 6 is formed on the surface of the vessel 2. A thin-film terminal portion 12 is formed on the circuit board 3 so that it is exposed externally through the opening 6. In this configuration, the battery pack can realize reduction in the weight and thickness and also reduce the production cost.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A battery pack comprising a vessel, a battery mounted in the vessel and a circuit board connected to the battery, wherein an opening is formed on the surface of the vessel and thin-film terminal portion is formed on the surface of the circuit board so that it is exposed externally through the opening.  
     
     
         2 . A battery pack according to  claim 2 , wherein said terminal portion includes a base layer formed on said circuit board and a plated layer formed on said base layer, and said plated layer is made of gold.  
     
     
         3 . A battery pack according to  claim 1 , wherein on said circuit board, an insulating layer is formed in the other area than the area where said terminal portion is formed, and said insulating layer is formed so as to cover a peripheral edge of said plated layer so that the surface of said circuit board and/or the surface of the base layer are not exposed externally.  
     
     
         4 . A method of manufacturing a battery pack having a vessel, a battery mounted in the vessel and a circuit board connected to the battery, comprising: 
 a step of forming a terminal portion in manufacturing said circuit board, said step of forming a terminal portion being to stack a base layer of copper and a plated layer of copper successively to form the terminal portion.    
     
     
         5 . A method of manufacturing a battery pack according to  claim 4 , further comprising: 
 a step of forming an insulating layer after said step of forming a terminal potion in manufacturing said circuit board, said step of forming an insulating layer being to form an insulating layer in the other area than the area where said terminal portion is formed, wherein said insulating layer is formed so as to cover a peripheral edge of said plated layer so that the surface of said circuit board and/or the surface of the base layer are not exposed externally.    
     
     
         6 . A battery pack according to  claim 1 , wherein said circuit board includes said terminal portion and an insulating layer portion, said terminal portion including a pattern of the base layer of a copper foil and a plated layer formed to cover the entire pattern of said base layer, and said insulating layer portion being formed of an insulating layer which exposes only a portion of the surface of said plated layer and covers the remaining area.  
     
     
         7 . A method of manufacturing a battery pack according to  claim 4 , further comprising the steps of: 
 forming a base layer of a copper pattern on a surface of an insulating board;    forming a plated layer so as to cover the entire base layer by selective plating;    forming an insulating layer on said plated layer and patterning said insulating layer so that only a portion of said plated layer is exposed externally.    
     
     
         8 . A battery pack according to  claim 6 , wherein said plated layer is protruded on the surface of the insulating layer.  
     
     
         9 . A battery pack according to  claim 6 , wherein said insulating layer is made of epoxy resin.  
     
     
         10 . A battery pack according to  claim 6 , wherein said circuit board is a hybrid integrated circuit comprising protecting circuit for excessive charging and excessive discharging.

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