Arrangement of integrated circuits in a memory module

Abstract

Integrated circuits utilizing standard commercial packaging are arranged on a printed circuit board to allow the production of 1-Gigabyte and 2-Gigabyte capacity memory modules. A first row of integrated circuits is oriented in an opposite orientation to a second row of integrated circuits. The integrated circuits in a first half of the first row and in the corresponding half of the second row are connected via a signal trace to a first register. The integrated circuits in a second half of the first row and in the corresponding half of the second row are connected to a second register. Each register processes a non-contiguous subset of the bits in each data word.

What is claimed is:  
     
         1 . A 1-Gigabyte capacity memory module comprising 36 integrated circuits of type 256-Megabit SDRAM organized as 64 Meg by 4 bits in a TSOP package having an approximate dimension of 5.25 inches wide by 2.05 inches high, the integrated circuits arranged in two rows on each of two surfaces of a printed circuit board.  
     
     
         2 . The memory module of  claim 1 , wherein the integrated circuits are Double Data Rate SDRAM.  
     
     
         3 . A 2-Gigabyte capacity memory module comprising 36 integrated circuits of type 512-Megabit SDRAM organized as 128 Meg by 4 bits in a TSOP package having an approximate dimension of 5.25 inches wide by 2.05 inches high, the integrated circuits arranged in two rows on each of two surfaces of a printed circuit board.  
     
     
         4 . The memory module of  claim 3 , wherein the integrated circuits are Double Data Rate SDRAM.