Visual device, interlocking counter, and image sensor

Abstract

As shown in FIG. 7, a visual device ( 2 ) detects position, size and form of at least one object in a digital image ( 111 ), by using a geometrical analysis means ( 37 ). In addition, the visual device ( 2 ) detects position, size, inclination, pattern, texture and color of a segmented object area ( 143 ) in a digital image ( 111 ) corresponding to at least one object area ( 141 ) separated from a background area by a figure/ground separation means ( 16 ). Therefore, the visual device ( 2 ) can make an environmental map for the object by using an environmental understanding means ( 31 ). As shown in FIG. 8, moreover, a visual device ( 2 ) can take a digital image ( 111 ) which shows the object whose size is suitable at its center, by controlling a moving camera ( 10 ).

1 . A visual device, for at least one object in an animation image comprising plurality of digital images, comprising: 
 a first image memorizing means memorizing said plurality of digital images in order;    an edge-information generation means generating a rough edge-information image from said plurality of digital images;    an edge-information formation means forming said rough edge-information image into a formed edge-information image by using said digital images; and    a geometrical analysis means generating a form-size-information image by detecting position, size and form of at least one said object in said digital image from said formed edge-information image,    wherein said geometrical analysis means comprises:    a position/size/inclination detection means generating an inclination-size-information image from said formed edge-information image; and    a position/size/form detection means generating said form-size-information image from said formed edge-information image and said inclination-size-information image.    
     
     
         2 . A visual device, for at least one object in an animation image comprising plurality of digital images, comprising: 
 a first image memorizing means memorizing said plurality of digital images in order;    an edge-information generation means generating a rough edge-information image from said plurality of digital images;    a first edge-information formation means forming said rough edge-information image into a first formed edge-information image by using said digital image;    a position/size detection means generating first redundant-information image, by detecting position and size of at least one said object segmented by first formed edge information constructing said first formed edge-information image;    a figure/ground separation means generating an object-area image representing at least one object area of at least one said object segmented by said first formed edge information, by using plurality of nonlinear oscillators; and    a second image memorizing means memorizing said object-area image in an appointed period,    wherein said figure/ground separation means separates at least one said object area from a background area in said digital image, by inputting all of first redundant information constructing said first redundant-information image to corresponding said nonlinear oscillators as external noise, respectively.    
     
     
         3 . A visual device comprising at least one data processing device consisting of plurality of array operation units arranged in a shape of a two-dimensional lattice, comprising: 
 a position/size/inclination detection means generating an inclination-size-information image from a binary image; and    a position/size/form detection means generating a form-size-information image from said binary image and said inclination-size-information image,    wherein said form-size-information image represents position, size and form of at least one object in said binary image, by that form-size information constructing each pixel of said form-size-information image represents said form and said size of said object.    
     
     
         4 . A visual device comprising at least one data processing device consisting of plurality of array operation units arranged in a shape of a two-dimensional lattice, comprising: 
 a position/size/inclination detection means generating an inclination-size-information image from a binary image; and    a position/size/form detection means generating a form-size-information image from said binary image and said inclination-size-information image,    wherein said form-size-information image represents texture of at least one object in said binary image, by that form-size information constructing each pixel of said form-size-information image represents form and size of said object.    
     
     
         5 . A visual device comprising a data processing device consisting of plurality of array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said array operation units comprises: 
 a means for initializing said array operation unit;  
 a means for finishing processing if there is no binary information or inclination-size information to be inputted;  
 a means for inputting said binary information and inclination-size information;  
 a means for separating said binary information and inclination-size information;  
 a means for transforming said binary information into redundant information;  
 a means for transforming said inclination-size information into transfer-source inclination-redundant information;  
 a means for calculating a center of gravity from neighbors of a band-pixel value in a redundant-information image representing said redundant information, and converting imagery of a transfer value derived from said center of gravity to a band-pixel value of a transfer-value image;  
 a means for transferring each of band-pixel values in a transfer-source inclination-redundant-information image representing transfer-source inclination-redundant information to a transfer position, according to said transfer value, for each inclination and each transfer source;  
 a means for transferring said band-pixel value in said redundant-information image to said transfer position, according to said transfer value;  
 a means for updating each of said band-pixel values in said transfer-source inclination-redundant-information image to a summation of  
 a summation of all of said band-pixel values in said transfer-source inclination-redundant-information image which have already been transferred and  
 a value corresponding to said inclination-size information among said band-pixel values in said transfer-source inclination-redundant-information image which have already been transferred,  
 for each inclination and each of said transfer-sources;  
 a means for updating said band-pixel value in said redundant-information image to a summation of all of said band-pixel values in said redundant-information image which have already been transferred; and  
 a means for outputting each of said band-pixel values in said transfer-source inclination-redundant-information image.  
 
     
     
         6 . A visual device comprising a data processing device consisting of plurality of array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said plurality of array operation units comprises: 
 a means for initializing said array operation unit;  
 a means for finishing processing if there is no binary information or inclination-size information to be inputted;  
 a means for inputting said binary information and inclination-size information;  
 a means for separating said binary information and inclination-size information;  
 a means for transforming said binary information into redundant information;  
 a means for transforming said inclination-size information into transfer-source inclination-redundant information;  
 a means for calculating a center of gravity from neighbors of a band-pixel value in a redundant-information image representing said redundant information, and converting imagery of a transfer value derived from said center of gravity to a band-pixel value of a transfer-value image;  
 a means for transferring each of band-pixel values in a transfer-source inclination-redundant-information image representing transfer-source inclination-redundant information to a transfer position, according to said transfer value, for each inclination and each transfer source;  
 a means for transferring said band-pixel value in said redundant-information image to said transfer position, according to said transfer value;  
 a means for updating each of said band-pixel values in said transfer-source inclination-redundant-information image to a summation of  
 a summation of all of said band-pixel values in said transfer-source inclination-redundant-information image which have already been transferred and  
 a value corresponding to said inclination-size information among said band-pixel values in said transfer-source inclination-redundant-information image which have already been transferred,  
 for each inclination and each of said transfer-sources;  
 a means for updating said band-pixel value in said redundant-information image to a summation of all of said band-pixel values in said redundant-information image which have already been transferred;  
 a means for discriminating form from all of said band-pixel values in said transfer-source inclination-redundant-information image;  
 a means for generating each of band-pixel values in a form-size-information image representing form-size information from said band-pixel values in said redundant-information image and a discrimination result of said form; and  
 a means for outputting each of said band-pixel values in said form-size-information image.  
 
     
     
         7 . A visual device comprising a data processing device consisting of plurality of array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said array operation units comprises: 
 a means for inputting a corresponding pixel in a binary image;  
 a means for inputting a corresponding pixel in a gray-scale image;  
 a means for calculating plurality of parameters in a nonlinear oscillator; and  
 a means for outputting a calculation result of said nonlinear oscillator,  
 wherein said nonlinear oscillator separates at least one object area segmented by said binary image from a background area,  
 by dealing with said corresponding pixel in said gray-scale image as an external noise.  
 
     
     
         8 . A visual device comprising plurality of array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said calculation data in each of said array operation units is transmitted counter-clockwisely between plurality of said array operation units arranged in a shape of a two-dimensional lattice, by that each of said array operation units comprises: 
 a means for sending said calculation datum calculated in said array operation unit to said array operation units at said four neighbors;  
 a means for transmitting said calculation datum received from said array operation unit on a left side among said four neighbors to at least one of said array operation unit on a right side and said array operation unit on an upper side;  
 a means for transmitting said calculation datum received from said array operation unit on a lower side among said four neighbors to at least one of said array operation unit on an upper side and said array operation unit on a left side;  
 a means for transmitting said calculation datum received from said array operation unit on a right side among said four neighbors to at least one of said array operation unit on a left side and said array operation unit on a lower side; and  
 a means for transmitting said calculation datum received from said array operation unit on an upper side among said four neighbors to at least one of said array operation unit on a lower side and said array operation unit on a right side.  
 
     
     
         9 . A visual device comprising plurality of array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said calculation data in each of said array operation units is transmitted clockwisely between plurality of said array operation units arranged in a shape of a two-dimensional lattice, by that each of said array operation units comprises: 
 a means for sending said calculation datum calculated in said array operation unit to said array operation units at said four neighbors;  
 a means for transmitting said calculation datum received from said array operation unit on a left side among said four neighbors to at least one of said array operation unit on a right side and said array operation unit on a lower side;  
 a means for transmitting said calculation datum received from said array operation unit on a lower side among said four neighbors to at least one of said array operation unit on an upper side and said array operation unit on a right side;  
 a means for transmitting said calculation datum received from said array operation unit on a right side among said four neighbors to at least one of said array operation unit on a left side and said array operation unit on an upper side; and  
 a means for transmitting said calculation datum received from said array operation unit on an upper side among said four neighbors to at least one of said array operation unit on a lower side and said array operation unit on a left side.  
 
     
     
         10 . A visual device comprising plurality of virtual array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said calculation data in each of said virtual array operation units is transmitted counter-clockwisely between plurality of said virtual array operation units arranged in a shape of a two-dimensional lattice, by that each of said virtual array operation units comprises: 
 a means for sending said calculation datum calculated in said virtual array operation unit to said virtual array operation units at said four neighbors;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a left side among said four neighbors to at least one of said virtual array operation unit on a right side and said virtual array operation unit on an upper side;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a lower side among said four neighbors to at least one of said virtual array operation unit on an upper side and said virtual array operation unit on a left side;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a right side among said four neighbors to at least one of said virtual array operation unit on a left side and said virtual array operation unit on a lower side; and  
 a means for transmitting said calculation datum received from said virtual array operation unit on an upper side among said four neighbors to at least one of said virtual array operation unit on a lower side and said virtual array operation unit on a right side.  
 
     
     
         11 . A visual device comprising plurality of virtual array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of said calculation data in each of said virtual array operation units is transmitted clockwisely between plurality of said virtual array operation units arranged in a shape of a two-dimensional lattice, by that each of said virtual array operation units comprises: 
 a means for sending said calculation datum calculated in said virtual array operation unit to said virtual array operation units at said four neighbors;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a left side among said four neighbors to at least one of said virtual array operation unit on a right side and said virtual array operation unit on a lower side;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a lower side among said four neighbors to at least one of said virtual array operation unit on an upper side and said virtual array operation unit on a right side;  
 a means for transmitting said calculation datum received from said virtual array operation unit on a right side among said four neighbors to at least one of said virtual array operation unit on a left side and said virtual array operation unit on an upper side; and  
 a means for transmitting said calculation datum received from said virtual array operation unit on an upper side among said four neighbors to at least one of said virtual array operation unit on a lower side and said virtual array operation unit on a left side.  
 
     
     
         12 . A visual device comprising plurality of array operation units or plurality of virtual array operation units arranged in a shape of a two-dimensional lattice,  
       wherein each of all of said array operation units and all of said virtual array operation units comprises a processor, a set of memories and plurality of controllers,  
       wherein at least one said controller transmits a calculation datum only at most a number of times related to a number of said controller, to which said processor wrote said calculation data,  
       by that 
 a number is assigned to at least two said controllers at intervals of an appointed number, and  
 each of all of said controllers, to which said number is assigned, communicates with at least one of said controllers, whose number shifts only said appointed number from said number of said controller, in each of adjoining said array operation units and adjoining said virtual array operation units,  
 for each of all of said array operation units and all of said virtual array operation units.  
 
     
     
         13 . An interlocked counter comprising a synchronous counter, a logic gate for judging end-value, a logic gate for amplifying interlocking signal, at least one latch circuit for interlocking signal, a logic gate for interlocking signal, and a logic gate for enable signal, wherein 
 behavior of said synchronous counter is stopped when a count number arrived at an end value, by that    said synchronous counter counts a number of pulses of a clock signal when said synchronous counter inputted an enable signal,    said logic gate for judging end-value generates an interlocking signal when said count number outputted by a synchronous counter coincided with said end value,    said logic gate for amplifying interlocking signal amplifies said interlocking signal in order to output to an external part, and    said logic gate for enable signal generates said enable signal when said interlocking signal is not generated, and    said behavior of said synchronous counter is restarted, by that    each of said latch circuits for interlocking signal memorizes one of said interlocking signals inputted from an external part when said interlocking signal outputted by said logic gate for judging end-value is not generated,    said logic gate for interlocking signal judges whether all of said latch circuits for interlocking signal memorize said interlocking signals, and    said logic gate for enable signal generates said enable signal when all of said latch circuits for interlocking signal memorize said interlocking signals.    
     
     
         14 . An interlocked counter comprising a synchronous counter which comprises at least one of a synchronous clear means and a synchronous load means, a logic gate for judging end-value, a logic gate for amplifying interlocking signal, at least one latch circuit for interlocking signal, a logic gate for interlocking signal, a logic gate for enable signal, and a logic gate for initialization,  
       wherein 
 behavior of said synchronous counter is stopped when a count number arrived at an end value, by that  
 said synchronous counter counts a number of pulses of a clock signal when said synchronous counter inputted an enable signal,  
 said logic gate for judging end-value generates an interlocking signal when said count number outputted by a synchronous counter coincided with said end value,  
 said logic gate for amplifying interlocking signal amplifies said interlocking signal in order to output to an external part, and  
 said logic gate for enable signal generates said enable signal when said interlocking signal is not generated,  
 said behavior of said synchronous counter is restarted, by that  
 each of said latch circuits for interlocking signal memorizes one of said interlocking signals inputted from an external part when said interlocking signal outputted by said logic gate for judging end-value is not generated,  
 said logic gate for interlocking signal judges whether all of said latch circuits for interlocking signal memorize said interlocking signals, and  
 said logic gate for enable signal generates said enable signal when all of said latch circuits for interlocking signal memorize said interlocking signals, and  
 said synchronous clear means and said synchronous load means set an initial value to said synchronous counter by using an initialization signal, by that said logic gate for initialization signal inputs said interlocking signal outputted by said logic gate for judging end-value and said enable signal, and generates said initialization signal.  
 
     
     
         15 . An interlocked counter according to  claim 13  or  14 , which comprises a synchronous oscillator comprising a self-oscillation circuit generating said clock signal, which comprises a latch circuit for synchronous signal, and at least one logic gate for amplifying clock signal, wherein 
 said latch circuit for synchronous signal inputs said enable signal,  
 an output of said latch circuit for synchronous signal changes phase of said clock signal, and  
 at least one said logic gate for clock signal amplifies said clock signal.  
 
     
     
         16 . An interlocked counter according to  claim 13  or  14 , which comprises a synchronous oscillator comprising: 
 a flip-flop circuit for synchronous signal,  
 a synchronous signal amplifier,  
 a loop filter,  
 a voltage controlled oscillator, and  
 at least one logic gate for amplifying clock signal,  
 wherein  
 said latch circuit for synchronous signal memorizes said enable signal,  
 said synchronous signal amplifier amplifies an output of said latch circuit for synchronous signal,  
 said loop filter reduces a noise included in an output of said synchronous signal amplifier,  
 said voltage controlled oscillator generates said clock signal,  
 said voltage controlled oscillator changes phase of said clock signal according to voltage outputted by said loop filter, and  
 at least one said logic gate for clock signal amplifies said clock signal.  
 
     
     
         17 . An interlocked device comprising plurality of interlocked counters according to at least one of  claim 13  to  16 ,  
       wherein said count numbers of said synchronous counters in said interlocked counters are even, by that 
 said plurality of interlocked counters are arranged on a plane;  
 all distance between adjoining said interlocked counters is equal;  
 adjoining said interlocked counters communicate said interlocking signals each other;  
 each of said interlocked counters memorizes all said interlocking signals outputted by at least one adjoining said interlocked counter; and  
 said synchronous counter in each of said interlocked counters stops said behavior until each of said interlocked counters memorizes all said interlocking signals.  
 
     
     
         18 . An image sensor comprising plurality of sensor modules, each of at least one of which comprises: 
 plurality of pixel cells arranged in a shape of a two-dimensional lattice;    charge coupled device arranged along an array of said pixel cells;    a drive device for charge transfer; and    an output amplifier,    wherein each of at least one said pixel cell comprises:    a photo-receptor element converting light to charges; and    a charge transfer gate, and    each of at least one said sensor module outputs said charges of said photo-receptor elements in all said pixel cells as a pixel signal in order, according to a pixel synchronous signal outputted by said drive device for charge transfer, by that    an output of said drive device for charge transfer make said charge transfer gate in at least one said pixel cell conduct;    said charge coupled device stores said charges of said photo-receptor element via at least one said charge transfer gate;    an output of said drive device for charge transfer transmits said charges stored in said charge coupled device toward said output amplifier in order; and    said output amplifier amplifies said charges stored in said charge coupled device in order,    in each of at least one said sensor module.    
     
     
         19 . An image sensor comprising plurality of sensor modules, each of at least one of which comprises: 
 plurality of pixel cells arranged in a shape of a two-dimensional lattice;    a vertical shift register;    a horizontal shift register;    plurality of row selection gates;    plurality of noise cancellers; and    an output amplifier,    wherein each of said pixel cells comprises:    a photo-receptor element converting light to charges;    a charge amplifier converting said charges to voltage; and    a column selection gate, and    each of said sensor modules outputs said charges of said photo-receptor elements in at least one said pixel cell as a pixel signal in order, according to a pixel synchronous signal outputted by said horizontal shift register, by that    an output of said vertical shift register make said column selection gate in at least one said pixel cell conduct;    each aid noise canceller reduces noise of said voltage outputted via at least one said column selection gate,    an output of said horizontal shift register make at least one said row selection gate conduct; and    said output amplifier amplifies an output of said noise cancellor outputted via at least one said row selection gate,    in each of said sensor modules.    
     
     
         20 . An image sensor according to  claim 18  or  19 , wherein 
 a layer in which at least one said sensor module is arranged in said shape of a lattice;  
 a layer in which plurality of A/D converters are arranged in said shape of a lattice; and  
 a layer in which plurality of digital circuits are arranged in a shape of said lattice are stacked, and said charges generated by at least one said photo-receptor element are inputted by a corresponding said digital circuit as said pixel datum, according to said pixel synchronous signal, in each of at least one said sensor module, by that  
 said pixel signal outputted by each of said sensor modules is inputted by a different said sensor module of said sensor modules;  
 each of said A/D converters converts said pixel signal to a pixel datum; and  
 said pixel datum outputted by each of said A/D converters is inputted by at least one different said digital circuit of said digital circuits.