US2004050708A1PendingUtilityA1

Plating method for PCB

Assignee: LG ELECTRONICS INCPriority: Sep 14, 2002Filed: Aug 20, 2003Published: Mar 18, 2004
Est. expirySep 14, 2022(expired)· nominal 20-yr term from priority
H05K 3/427H05K 3/242H05K 3/28H05K 3/0052H05K 2203/1572C25D 5/022H05K 2201/0959H05K 2203/054H05K 3/243H05K 3/18
38
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Claims

Abstract

A plating method for a printed circuit board includes: a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads; a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source; a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it; a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and a fifth step of making the power connection portion and the external power source to be electrically short. With this method, a printed circuit board without a power supply line for gold-plating can be obtained.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A plating method for a printed circuit board comprising: 
 a first step of providing a substrate having a plurality of connection pads and circuit patterns connected to the connection pads;    a second step of using some of the circuit patterns provided on a surface of the substrate as a power connection portion and connecting the power connection portion to an external power source;    a third step of covering a surface of the substrate excepting the connection pads with a plating resistance resist to shield it;    a fourth step of supplying power to the connection pad through the power connection portion and forming a gold-plated layer on the connection pad; and    a fifth step of making the power connection portion and the external power source to be electrically short.    
     
     
         2 . The method of  claim 1 , wherein the second step comprises: 
 coating a photoresist at the surface of the substrate;    removing a portion of the photoresist to expose the connection pad and exposing some of the circuit patterns to form a power connection portion; and    coating an electrolyte layer on the surface of the substrate for connecting between the power connection portion and an external power source.    
     
     
         3 . The method of  claim 2 , wherein the power connection portion is formed by removing a photoresist from a portion of the circuit pattern, and receives power by being connected to the electrolyte layer.  
     
     
         4 . The method of  claim 2 , wherein the electrolyte layer is formed through an electroless plating method  
     
     
         5 . The method of  claim 2 , wherein the electrolyte layer has a thickness of 0.3˜0.7 μm.  
     
     
         6 . The method of  claim 2 , wherein the electrolyte layer is formed to have a desired thickness by additionally performing an electrolytic plating method on the formed electrolyte layer.  
     
     
         7 . The method of  claim 2 , wherein, in the third step, the plating resistance resist is coated on the surface of the substrate formed the electrolyte layer.  
     
     
         8 . The method of  claim 2 , wherein the fifth step comprises: 
 removing the electrolyte layer and the plating resistance resist; and    coating a photoresist on the surface of the electrolyte layer and the plating resistance resist-removed substrate to cover the power connection portion to make power short.    
     
     
         9 . A plating method for a printed circuit board comprising: 
 a first step of providing a substrate having a plurality of bonding pads and ball pads at both sides thereof and a circuit pattern to which the bonding pads and the ball pads are connected;    a second step of using some of the circuit patterns provided at the surface of the substrate as first and second power connection portions and connecting the first power connection portion to an external power source;    a third step of covering the surface of the substrate with the ball pad formed thereon with a plating resistance resist to shield it;    a fourth step of supplying power to the bonding pad through the first power connection portion for forming a gold-plated layer on the bonding pad;    a fifth step of making the first power connection portion and the external power source to be electrically short;    a sixth step of connecting the second power connection portion to the external power source and coating a plating resistance resist at the surface of the substrate with the bonding pad formed thereon to shield it;    a seventh step of supplying power to the ball pad through the second power connection portion for forming a gold-plated layer on the ball pad; and    an eighth step of making the second power connection portion and the external power source to be electrically short.    
     
     
         10 . The method of  claim 9 , wherein the second step comprises: 
 coating a photoresist on both surfaces of the substrate;    removing a portion of the photoresist to expose the bonding pad and the ball pad and exposing some of the circuit patterns to form first and second connection portion; and    coating an electrolyte layer on the surface of the substrate where the ball pad is formed in order to connect the first power connection portion to an external power source.    
     
     
         11 . The method of  claim 10 , wherein the first and second power connection portion is formed by removing a photoresist from a portion of the circuit pattern, and receives power by being connected to the electrolyte layer.  
     
     
         12 . The method of  claim 10 , wherein the electrolyte layer is formed through an electroless plating method  
     
     
         13 . The method of  claim 10 , wherein the electrolyte layer has a thickness of 0.3˜0.7 μm.  
     
     
         14 . The method of  claim 10 , wherein the electrolyte layer is formed to have a desired thickness by additionally performing an electrolytic plating method on the formed electrolyte layer.  
     
     
         15 . The method of  claim 10 , wherein, in the third step, the plating resistance resist is coated on the surface of the substrate with the electrolyte layer formed thereon.  
     
     
         16 . The method of  claim 10 , wherein the fifth step comprises: 
 removing the electrolyte layer and the plating resistance resist; and    coating a photoresist at the surface of the electrolyte layer and the plating resistance resist-removed substrate to cover the first power connection portion to make power short.    
     
     
         17 . The method of  claim 9 , wherein the sixth step comprises: 
 forming an electrolyte layer at the surface of the substrate where the bonding pad is formed to electrically connect it to the second power connection portion; and    coating a plating resistance resist on a surface of the electrolyte layer.    
     
     
         18 . The method of  claim 10 , wherein the eighth step comprises: 
 removing the plating resistance resist and the electrolyte layer; and    covering the second power connection portion with a photoresist to make the second power connection to be short electrically.

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