US2004046228A1PendingUtilityA1
Apparatus and method for fabricating a high reverse voltage semiconductor device
Priority: Aug 7, 2001Filed: Aug 13, 2003Published: Mar 11, 2004
Est. expiryAug 7, 2021(expired)· nominal 20-yr term from priority
H10P 14/3411H10P 14/2905H10P 14/3822H10D 62/104Y10S257/91
41
PatentIndex Score
0
Cited by
0
References
0
Claims
Abstract
The present invention provides a high voltage semiconductor device capable of withstanding excessive breakdown and clamping voltages. The device includes a high resistivity substrate, and an epitaxially grown, low resistivity layer having a stress-relieving dopant. During production, the low conductivity region has one surface that is etched before a high conductivity region is diffused into it or epitaxially deposited on it.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . An electrical semiconductor device comprising:
a substrate of relatively high resistivity material of one conductivity type having opposing first and second surfaces, the first surface being etched; a layer of relatively low resistivity material of the one conductivity type and having one surface substantially contiguous to the first surface of the substrate; and an epitaxial region of relatively low resistivity material of a conductivity type opposite to the one conductivity type and having one surface substantially contiguous to the second surface of the substrate.
2 . The device of claim 1 wherein the layer is diffused into the first surface of the substrate.
3 . The device of claim 1 wherein the layer is epitaxially grown onto the first surface of the substrate.
4 . The device of claim 1 wherein the epitaxial region includes a stress-relieving dopant.
5 . The device of claim 4 wherein the stress-relieving dopant is germanium.
6 . An electrical semiconductor device comprising:
an epitaxial layer of relatively high resistivity material of one conductivity type and having opposing first and second surfaces; a substrate of relatively low resistivity material of a conductivity type opposite to the one conductivity type and having a surface substantially contiguous to the first surface of the epitaxial layer; and a dopant region of relatively low resistivity material of the one conductivity type having a surface substantially contiguous to the second surface of the epitaxial layer.
7 . The device of claim 6 wherein the second surface is etched, and the dopant region is diffused into the second surface of the epitaxial layer.
8 . The device of claim 6 wherein the second surface is etched, and the dopant region is epitaxially grown onto the second surface of the epitaxial layer.
9 . The device of claim 6 wherein a silicon oxide mask is applied to the first surface of the substrate and the layer is diffused through the silicon oxide mask and into the second surface of the substrate.
10 . The device of claim 6 wherein the epitaxial region includes a stress-relieving dopant.
11 . The device of claim 10 wherein the stress-relieving dopant is germanium.
12 . An electrical semiconductor device comprising:
an epitaxial layer of relatively high resistivity material of one conductivity type and having opposing first and second surfaces, the epitaxial layer further having a dopant material permeated throughout the layer; a substrate of relatively low resistivity material of a conductivity type opposite to the one conductivity type and having a surface substantially contiguous to the first surface of the epitaxial layer; and a region of relatively low resistivity material of the one conductivity type having a surface substantially contiguous to the second surface of the epitaxial layer.
13 . The device of claim 12 wherein the dopant is a stress-relieving dopant.
14 . The device of claim 13 wherein the stress-relieving dopant is germanium.
15 . The device of claim 12 wherein a silicon oxide mask is applied to the second surface of the epitaxial layer and the region is diffused through the silicon oxide mask and into the second surface of the epitaxial layer.
16 . A method for fabricating an electrical semiconductor device comprising:
selecting a substrate of relatively low conductive material of one conductivity type, the substrate having opposing first and second surfaces; etching the first surface of the substrate; diffusing a region of high conductivity material of the one conductivity type into the first surface of the substrate; and growing an epitaxial layer of high conductivity material onto the second surface of the substrate, the epitaxial layer having a conductivity type opposite to the one conductivity type.
17 . A method for fabricating an electrical semiconductor device comprising:
preparing a substrate of relatively low conductivity material of one conductivity type, the substrate having opposing first and second surfaces; etching the first surface of the substrate; growing a first epitaxial layer of high conductivity material of the one conductivity type onto the first surface of the substrate; and growing a second epitaxial layer of high conductivity material onto the second surface of the substrate, the second epitaxial layer having a conductivity type opposite to the one conductivity type.
18 . A method for fabricating an electrical semiconductor device comprising:
selecting a substrate of relatively high conductivity material of one conductivity type, the substrate having a first surface; growing an epitaxial layer onto the first surface of the substrate, the epitaxial layer having opposing first and second surfaces, with the first epitaxial surface being substantially contiguous to the first surface of the substrate, and being of a low conductivity material of a conductivity type opposite to the one conductivity type; introducing a dopant material to the epitaxial layer; applying a silicon oxide layer to the second epitaxial surface; creating a silicon oxide mask by etching portions of the silicon oxide layer to expose portions of the second epitaxial surface; and diffusing a high conductivity layer through the mask and into the second epitaxial layer, the diffused layer being of a conductivity type opposite to the one conductivity type
19 . The device of claim 18 wherein the dopant material is a stress-relieving dopant material.
20 . The device of claim 18 wherein the stress-relieving dopant material is germanium.
21 . An electrical semiconductor device comprising:
a first layer of relatively high resistivity material of one conductivity type having opposing first and second surfaces; a second layer of relatively low resistivity material of a conductivity type opposite to the one conductivity type and having one surface substantially contiguous to the first surface of the substrate; a region of relatively low resistivity material of the one conductivity type and having one surface substantially contiguous to the second surface of the substrate; and a substantially centrally located well formed in the first layer such that the distance between the region and the second layer is reduced at the location of the well.Join the waitlist — get patent alerts
Track US2004046228A1 — get alerts on status changes and closely related new filings.
We store only your email — no account needed. See our privacy policy.