US2004032899A1PendingUtilityA1

Digital spread spectrum simulator

Priority: Feb 25, 2000Filed: Aug 15, 2003Published: Feb 19, 2004
Est. expiryFeb 25, 2020(expired)· nominal 20-yr term from priority
Inventors:Marc Blumer
H04B 15/04H04B 2215/064H04B 2215/067
42
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Claims

Abstract

Simple digital devices and methods are described for reducing electromagnetic interference even where a clock signal to the device is rapidly turned ON and OFF. A primary clock signal drives a signal selector. A signal delay is included to provide delayed clock pulse signals. The signal delay detunes the primary clock signal. By repeatedly switching the delay in and out of the clock signal path, a first signal is generated having a frequency at or about the clock signal, and, a second signal is generated which is displaced slightly from the first signal, but still at or about the clock frequency. By repeatedly switching the delay in and out of the primary clock signal path at a rate greater than the frequency of the clock signal, smaller portions of each primary clock pulse may be parsed for subsequent reaggregation to create a spread spectrum clock signal. As a result, a plurality of spread spectrum clock signals at varying frequencies may be created to spread the energy of the signal over a broader spectrum, thereby lowering the signal energy peak to minimize radiation of electromagnetic emissions at undesirable levels.

Claims

exact text as granted — not AI-modified
1 . A spread spectrum system for generating a reduced amplitude clock pulse from an original primary clock pulse, the system comprising: 
 a clock signal generator for creating a series of clock pulses;    a non-delayed line adapted to receive the series of clock pulses from the clock signal generator;    a delay line comprising a delay time and adapted to cause a clock signal transmitted to the delay line to be outputted after passage of the delay time; and    a multiplexer comprising a non-delay line input, a delay line input and an output, wherein the multiplexer receives output directly from the non-delayed line and the delay line; and    a state machine adapted to cause the multiplexer to select either the non-delayed line or the delayed line.    
     
     
         2 . A method for generating a clock output signal with reduced amplitude electromagnetic interference (EMI) spectral components, the method comprising: 
 providing a means to generate a series of clock pulses;    generating a series of clock pulses;    digitally modulating the clock pulses by spreading the energy of each clock pulse over a greater bandwidth; and    generating a digitally-modulated clock output signal.    
     
     
         3 . A clock circuit for generating a clock output signal with reduced amplitude electromagnetic interference (EMI) spectral components, the clock circuit comprising: 
 oscillator means for generating a primary clock signal, wherein the primary clock signal has a fundamental frequency with a fundamental amplitude; and    spread spectrum clock generating means cooperating with the oscillator means for generating a spread spectrum clock output signal having a nominal frequency and reduced amplitude EMI spectral components at harmonics of the nominal frequency, wherein the nominal frequency is substantially equivalent to the fundamental frequency, and wherein the nominal amplitude is lower than the fundamental amplitude.

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