Semiconductor device and its manufacturing method

Abstract

A semiconductor device includes: an n + type drain region; an n type drift region that connects with the n + type drain region; a p type body region; a n + type source region that connects with the p type body region; and a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the p type body region. The semiconductor further includes: a p type silicon region that adjoins the n type drift region; and an n type silicon region provided in a region almost including a carrier passage that connects the n type drift region and the p type body region. Here, the p type silicon region and the p type body region directly connect with each other.

What is claimed is:  
     
         1 . A semiconductor device comprising: 
 a drain region that is a first-conductivity type;    a drift region that is a first-conductivity type and connects with the drain region;    a body region that is a second-conductivity type;    a source region that is a first-conductivity type and connects with the body region;    a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the body region;    a first semiconductor region that is a first-conductivity type and provided between the drift region and the body region; and    a second semiconductor region that is a second-conductivity type and connects with the drift region and the body region.    
     
     
         2 . A semiconductor device according to  claim 1 , 
 wherein, when electric voltage is applied to the gate electrode, a channel is formed inside the body region,    wherein carriers flow from the source region to the drain region through the channel and the drift region, and    wherein the first semiconductor region is located at least in a portion of a region where the carriers flow through.    
     
     
         3 . A semiconductor device according to  claim 1 , 
 wherein the first semiconductor region connects with at least one of the drift region and the body region.    
     
     
         4 . A semiconductor device according to  claim 3 , 
 wherein, when electric voltage is applied to the gate electrode, a channel is formed in the body region, and    wherein the first semiconductor region connects with the channel.    
     
     
         5 . A semiconductor device according to  claim 1 , 
 wherein the drift region is provided below the gate trench,    wherein the first semiconductor region is provided between the drift region and a bottom of the gate trench, and    wherein the first semiconductor region has, in a width direction of the gate trench, broader width than the drift region.    
     
     
         6 . A semiconductor device according to  claim 5 , 
 wherein the first semiconductor region has the broader width than the drift region by almost same length in each of both ends of the width.    
     
     
         7 . A semiconductor device according to  claim 1 , 
 wherein the drift region is provided below the gate trench,    wherein the first semiconductor region is provided between the drift region and a bottom of the gate trench, and    wherein the first semiconductor region has, in a width direction of the gate trench, broader width than the gate trench.    
     
     
         8 . A semiconductor device according to  claim 7 , 
 wherein the first semiconductor region has the broader width than the gate trench by almost same length in each of both ends of the width.    
     
     
         9 . A semiconductor device according to  claim 1 , 
 wherein the first semiconductor region surrounds a bottom of the gate trench and lower portions of side walls of the gate trench.    
     
     
         10 . A semiconductor device comprising: 
 a drain region that is a first-conductivity type;    a drift region that is a first-conductivity type and connects with the drain region;    a body region that is a second-conductivity type and connects with the drift region;    a source region that is a first-conductivity type and connects with the body region;    a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the body region; and    a semiconductor region that is a second-conductivity type and connects with the drift region and the body region.    
     
     
         11 . A semiconductor device according to  claim 10 , 
 wherein, when electric voltage is applied to the gate electrode, a channel is formed inside the body region, and    wherein the drift region connects with the channel.    
     
     
         12 . A semiconductor device according to  claim 10 , 
 wherein the drift region is provided below the gate trench, and    wherein the drift region has, in a width direction of the gate trench, broader width than the gate trench.    
     
     
         13 . A semiconductor device according to  claim 12 , 
 wherein the drift region has the broader width than the gate trench by almost same length in each of both ends of the width.    
     
     
         14 . A semiconductor device according to  claim 10 , 
 wherein the drift region surrounds a bottom of the gate trench and lower portions of side walls of the gate trench.    
     
     
         15 . A semiconductor device manufacturing method comprising steps of: 
 forming a drain region of a first-conductivity type;    forming, over a surface of the drain region, alternate layers of a drift region of a first-conductivity type and a second semiconductor region of a second-conductivity type, wherein the alternate layers are substantially orthogonal to the surface of the drain region;    forming, over the drift region, a first semiconductor region of a first-conductivity type, wherein the first semiconductor region is broader than the drift region in a direction parallel with the surface of the drain region;    forming, over the second semiconductor region and the first semiconductor region, a body region of a second-conductivity type;    forming a gate trench that penetrates the body region and connects with the first semiconductor region; and    filling a gate electrode in the gate trench.    
     
     
         16 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein the first semiconductor region is formed for being broader than the gate trench in the direction parallel with the surface of the drain region.    
     
     
         17 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the alternate layers of the drift region and the second semiconductor region are formed, an intermediate first semiconductor region of the first-semiconductor type is formed,    wherein a connecting region that is a second-conductivity type and reaches the second semiconductor region is then formed as an extended portion of the second semiconductor region by adding a second-conductivity-type impurity to a portion of the intermediate first semiconductor region, and the first semiconductor region is formed as a region excluding the connecting region from the intermediate first semiconductor region, and    wherein the body region is formed for being deposited over the first semiconductor region and the second semiconductor region that includes the connecting region.    
     
     
         18 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the alternate layers of the drift region and the second semiconductor region are formed, an intermediate first semiconductor region of the first-semiconductor type is formed,    wherein a certain trench that penetrates a portion of the intermediate first semiconductor region to reach the second semiconductor region is formed, and the first semiconductor region is formed as a region excluding a region of the certain trench from the intermediate first semiconductor region, and    wherein the body region is formed for being deposited over the first semiconductor region and inside the certain trench over the second semiconductor region.    
     
     
         19 . A semiconductor device manufacturing method according to  claim 18 , 
 wherein the intermediate first semiconductor region is formed for being deposited over the alternate layers of the drift region and the second semiconductor region.    
     
     
         20 . A semiconductor device manufacturing method according to  claim 19 , 
 wherein, after the drain region is formed, an intermediate second semiconductor region of a second-conductivity type is deposited over the drain region,    wherein a given trench is formed for penetrating a portion of the intermediate second semiconductor region to reach the drain region,    wherein the alternate layers of the drift region and the second semiconductor region are formed by depositing the drift region inside the given trench, and    wherein the intermediate first semiconductor region is then consecutively formed for being deposited.    
     
     
         21 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the alternate layers of the drift region and the second semiconductor region are formed, an intermediate second-conductivity-type layer is formed for being deposited over the alternate layers, and    wherein the first semiconductor region is formed by adding a first-conductivity type impurity to the intermediate second-conductivity-type layer.    
     
     
         22 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the alternate layers of the drift region and the second semiconductor region are formed, the first semiconductor region is formed by adding a first-conductivity-type impurity to upper portions of the alternate layers.    
     
     
         23 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the drain region is formed, an intermediate drift region of a first-conductivity type is formed over the drain region,    wherein a given trench is formed for penetrating a portion of the intermediate drift region to reach the drain region,    wherein the alternate layers of the drift region and the second semiconductor region are formed by depositing the second semiconductor region inside the given trench,    wherein an intermediate second-conductivity-type layer is then consecutively formed for being deposited, and    wherein the first semiconductor region is then formed by adding a first-conductivity-type impurity to the intermediate second-conductivity-type layer.    
     
     
         24 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the drain region is formed, an intermediate second semiconductor region of a second-conductivity type is deposited over the drain region,    wherein a given trench is formed for penetrating a portion of the intermediate second semiconductor region to reach the drain region,    wherein the alternate layers of the drift region and the second semiconductor region are formed by depositing the drift region inside the given trench,    wherein the intermediate first semiconductor region is then consecutively formed for being deposited,    wherein the first semiconductor region is formed, along with a connecting region that is a second-conductivity type and connects with the second semiconductor region, at least by adding a second-conductivity-type impurity to a certain portion of the intermediate first semiconductor region, and    wherein the body region is also formed at least by adding the second-conductivity-type impurity to a given portion of the intermediate first semiconductor region.    
     
     
         25 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the alternate layers of the drift region and the second semiconductor region are formed, an intermediate first-conductivity-type layer is formed by adding a first-conductivity-type impurity to upper portions of the alternate layers, and    wherein the first semiconductor region and the body region are formed, along with a second-conductivity-type connecting region that is formed as one of an extended portion of the second semiconductor region and an extended portion of the body region, at least by adding a second-conductivity-type impurity to the intermediate first-conductivity-type layer.    
     
     
         26 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the drain region is formed, an intermediate drift region of a first-conductivity type is formed over the drain region,    wherein a given trench is formed for penetrating a portion of the intermediate drift region to reach the drain region,    wherein the alternate layers of the drift region and the second semiconductor region are formed by depositing the second semiconductor region inside the given trench,    wherein an intermediate second-conductivity-type layer is then consecutively formed for being deposited, and    wherein the first semiconductor region is then formed, along with the body region and a second-conductivity-type connecting region that is formed as one of an extended portion of the second semiconductor region and an extended portion of the body region, at least by adding a first-conductivity-type impurity to a portion of the intermediate second-conductivity-type layer.    
     
     
         27 . A semiconductor device manufacturing method according to  claim 15 , 
 wherein, after the drain region is formed, an intermediate second semiconductor region is formed over the drift region, a certain trench is formed over the intermediate second semiconductor region, and a given trench is formed under the certain trench with adjoining a bottom of the certain trench for penetrating the intermediate second semiconductor region to reach the drain region, wherein the given trench is narrower in width than the certain trench, and    wherein the drift region is formed for being deposited inside the given trench and, then consecutively, the first semiconductor region is formed for being deposited inside the certain trench.    
     
     
         28 . A semiconductor device including: 
 a drain region that is a first-conductivity type;    a drift region that is a first-conductivity type and connects with the drain region;    a body region that is a second-conductivity type;    a source region that is a first-conductivity type and connects with the body region; and    a gate electrode that is provided, with being covered by a gate insulation film, in a gate trench that penetrates the body region,    wherein a channel is formed inside the body region when electric voltage is applied to the gate electrode, and    wherein carriers flow from the source region through the body region and the drift region to the drain region,    the semiconductor device comprising: 
 a first semiconductor region that is a first-conductivity type and provided at least in a portion of a carrier passage that intermediates between the drift region and the body region; and  
 a second semiconductor region that is a second-conductivity type and connects with the drift region and the body region.