Fabrication of substrates with a useful layer of monocrystalline semiconductor material

Abstract

The invention concerns a method of fabricating a substrate that includes a layer of at least one semiconductor material on a support. The substrate is fabricated by affixing a nucleation layer to an intermediate support substrate to form a barrier layer against diffusion of atoms from the intermediate support substrate, depositing at least one layer of semiconductor material to the nucleation layer; attaching a target substrate to the deposited semiconductor material to form a final support assembly, and removing the intermediate support substrate and the nucleation layer from the final support assembly. The final support assembly includes the target substrate, the deposited semiconductor material, the nucleation layer and the intermediate support substrate so that, after removal of the intermediate support substrate, a substrate is provided that includes at least one layer of at least one semiconductor material on a support.

What is claimed is:  
     
         1 . A method for fabricating a substrate comprising at least one layer of at least one semiconductor material on a support, which comprises: 
 providing an intermediate support that includes a nucleation layer as a barrier against diffusion of atoms from the intermediate support;    providing at least one layer of a semiconductor material upon the nucleation layer;    bonding a target substrate to the deposited semiconductor material to form a final support assembly comprising the target substrate, the deposited semiconductor material, the nucleation layer and the intermediate support; and    processing the final support assembly to chemically remove at least one of the intermediate support or the nucleation layer, thus providing a substrate comprising the at least one layer of semiconductor material on the target substrate.    
     
     
         2 . The method according to  claim 1 , wherein the intermediate support is removed by etching.  
     
     
         3 . The method according to  claim 2 , wherein the intermediate support is etched with an acid solution.  
     
     
         4 . The method according to  claim 1 , wherein the intermediate support is provided by: 
 implanting atomic species into at least a portion of a source substrate to define the nucleation layer, wherein a main concentration of implanted atomic species defines a detachment zone;    attaching the source substrate implanted with the atomic species to at least a portion of the intermediate support to form a source substrate-intermediate support assembly;    treating the assembly to detach the intermediate support and nucleation layer.    
     
     
         5 . The method according to  claim 2 , wherein the treating step comprises applying thermal or mechanical stress to the assembly to detach the intermediate support and nucleation layer.  
     
     
         6 . The method according to  claim 1 , which further comprises affixing the nucleation layer to the intermediate support by molecular bonding.  
     
     
         7 . The method according to  claim 6 , wherein at least one bonding layer is applied to at least one of the nucleation layer or the intermediate support prior to affixing the nucleation layer to the intermediate support.  
     
     
         8 . The method according to  claim 1 , wherein the intermediate support is selected from the group consisting of: silicon, gallium arsenide, zinc oxide, lithium gallium oxide and lithium aluminum oxide.  
     
     
         9 . The method according to  claim 1 , wherein the semiconductor material comprises at least one mono or poly-metallic nitride.  
     
     
         10 . The method according to  claim 9 , wherein the semiconductor material layer comprises gallium nitride, and further wherein the nucleation layer is selected from the group consisting of silicon carbide, gallium nitride and sapphire.  
     
     
         11 . The method according to  claim 1 , wherein the final support includes a reflective coating.  
     
     
         12 . The method according to  claim 1 , wherein the layer of semiconductor material is epitaxially deposited on the nucleation layer.  
     
     
         13 . The method according to  claim 1 , which further comprises providing a second barrier layer between the nucleation layer and the intermediate support.  
     
     
         14 . A method for fabricating a substrate comprising a layer of semiconductor material on a support, wherein the method comprises: 
 providing an intermediate support that includes a barrier layer that is resistant to diffusing elements derived from dissociation of the intermediate support, providing a nucleation layer affixed to the barrier layer;    depositing upon the nucleation layer at least one layer of semiconductor material by epitaxial growth;    bonding the at least one layer of semiconductor material to a final support such that a first surface of the semiconductor material is attached to the intermediate support and a second surface of the semiconductor material is attached to the final support; and    chemically removing the intermediate support from the semiconductor material to obtain the at least one layer of semiconductor material on the final support.    
     
     
         15 . The method according to  claim 14 , wherein the intermediate support is removed by etching.  
     
     
         16 . The method according to  claim 15 , wherein the intermediate support is etched with an acid solution.  
     
     
         17 . The method according to  claim 14 , wherein method further comprises: 
 implanting the atomic species into at least a portion of a source substrate to define at least one of the barrier layer or the nucleation layer, wherein a main concentration of the implanted atomic species defines a detachment zone;    bonding the source substrate implanted with the atomic species to at least a portion of the intermediate support to form a source substrate-intermediate support assembly; and    treating the assembly to detach the intermediate support and barrier or nucleation layer.    
     
     
         18 . The method according to  claim 17 , wherein the treating step comprises applying a thermal or mechanical stress at the detachment zone.  
     
     
         19 . The method according to  claim 14 , wherein the barrier layer is first applied to the intermediate support and the nucleation layer is then applied to the barrier layer.  
     
     
         20 . The method according to  claim 19 , wherein a layer of adhesive is applied to at least one of the surfaces of the barrier layer or the nucleation layer to define a bonding layer.  
     
     
         21 . The method according to  claim 14 , wherein at least one of the barrier layer or the nucleation layer is formed by a deposition technique.  
     
     
         22 . The method according to  claim 14 , wherein the intermediate support is selected from the group consisting of silicon, gallium arsenide, zinc oxide, lithium gallium oxide and lithium aluminum oxide.  
     
     
         23 . The method according to  claim 14 , wherein the semiconductor layer comprises at least one mono or poly-metallic nitride.  
     
     
         24 . The method according to  claim 14 , wherein the semiconductor material layer is comprises gallium nitride, and further wherein the nucleation layer is selected from the group consisting of silicon carbide, gallium nitride and sapphire.  
     
     
         25 . The method according to  claim 14 , wherein the final support includes a reflective coating.