Bump formed on semiconductor device chip and method for manufacturing the bump

Abstract

A bump of a semiconductor chip comprises a plurality of bond pads formed on a semiconductor chip, a conductive bump formed on the bond pads; and a sidewall insulating layer formed on sidewalls of the conductive bump. It is possible for the semiconductor chip to prevent electrical shorts and improve productivity even though a pitch of bond pad is decreased.

What is claimed is:  
     
         1 . A bump of a semiconductor chip, comprising: 
 a plurality of bond pads formed on a semiconductor chip;    a conductive bump formed on the bond pads; and    a sidewall insulating layer formed on sidewalls of the conductive bump.    
     
     
         2 . The bump of a semiconductor chip of  claim 1 , wherein the sidewall insulating layer is formed of a polymer material such as polymide or epoxy.  
     
     
         3 . The bump of a semiconductor chip of  claim 1 , wherein the conductive bump comprises: 
 a conductive packing layer that contacts the conductive pad; and    a capping conductive layer formed on the conductive packing layer.    
     
     
         4 . The bump of a semiconductor chip of  claim 3 , wherein the conductive packing layer is formed of nickel alloy.  
     
     
         5 . The bump of a semiconductor chip of  claim 4 , wherein the conductive packing layer is formed by non-electrolytic plating.  
     
     
         6 . The bump of a semiconductor chip of  claim 3 , wherein the capping conductive layer is formed of gold (Au).  
     
     
         7 . The bump of a semiconductor chip of  claim 1 , wherein the conductive packing layer extends above a top surface of the sidewall insulating layer.  
     
     
         8 . A method for manufacturing a semiconductor chip, the method comprising; 
 forming an insulating layer on a semiconductor chip having a plurality of bond pads formed thereon;    forming a contact hole in the insulating layer to expose the bond pads;    forming a bump conductive layer in the contact hole; and    forming a sidewall insulating layer on sidewalls of the bump conductive layer by removing a portion of the insulating layer.    
     
     
         9 . The method of  claim 8 , wherein the insulating layer comprises a polymer material.  
     
     
         10 . The method of  claim 9 , wherein the polymer material is one of polymide or epoxy.  
     
     
         11 . The method of  claim 8 , wherein the forming a contact hole in the insulating layer comprises etching a portion of the insulating layer using laser irradiation.  
     
     
         12 . The method of  claim 8 , wherein the forming a bump conductive layer in the contact hole comprises; 
 forming a seed metal on the exposed bond pads;    forming a metal packing layer on the seed metal; and    forming a capping metal layer on the metal packing layer.    
     
     
         13 . The method of  claim 12 , wherein the metal packing layer is formed of nickel Ni or nickel alloy.  
     
     
         14 . The method of  claim 12 , wherein the capping metal layer is formed of gold (Au).  
     
     
         15 . The method of  claim 12 , further comprising forming a solder ball on the capping metal layer.  
     
     
         16 . The method of  claim 8 , wherein the forming a sidewall insulating layer on sidewalls of the bump conductive layer comprises: 
 forming a photoresist pattern overlying the bump conductive layer; and    etching the insulating layer to leave a portion of the insulating layer on the sidewalls of the bump conductive layer to form the sidewall insulating layer, using the photoresist pattern as a mask.    
     
     
         17 . The method of  claim 16 , wherein the etching comprises laser irradiation.  
     
     
         18 . The method of  claim 8 , wherein the forming a sidewall insulating layer on sidewalls of the bump conductive layer by removing a portion of the insulating layer comprises: 
 over growing the bump conductive layer on a top of the insulating layer to a predetermined height; and    etching the insulating layer using the overgrown bump conductive layer as a mask.    
     
     
         19 . The method of  claim 18 , wherein the overgrowing the bump conductive layer comprises: 
 forming a seed metal in the contact hole;    growing a metal packing layer on the seed metal and growing the metal packing layer to extend above the contact hole to a predetermined amount; and    forming a capping metal layer on the metal packing layer.    
     
     
         20 . The method of  claim 18 , wherein the metal packing layer is formed of nickel or nickel alloy.  
     
     
         21 . The method of  claim 18 , wherein the etching comprises laser irradiation.  
     
     
         22 . A chip-on-glass (COG) package comprising; 
 a package substrate having a plurality of connection pads;    a semiconductor chip comprising a plurality of bond pads arranged to face the plurality of connection pads and to be electrically connected thereto;    a bump having an insulating layer formed on sidewalls thereof, the bump overlying the bond pads; and    an anisotropic conductive film interposed between the semiconductor chip and the package substrate to electrically connect the connection pads and the bump.    
     
     
         23 . The COG package of  claim 22 , wherein the bump comprises: 
 a packing metal layer formed on the bond pads; and    a capping metal layer formed on the metal packing layer.    
     
     
         24 . The COG package of  claim 23 , wherein the packing metal layer is formed of nickel or nickel alloy, and the capping metal layer is formed of gold (Au).  
     
     
         25 . The COG package of  claim 22 , wherein the insulating layer comprises a polymer.  
     
     
         26 . The COG package of  claim 25 , wherein the polymer layer is formed of one of polymide or epoxy.  
     
     
         27 . The COG package of  claim 23 , wherein the packing metal layer is formed by non-electrolytic plating.