Providing electrical conductivity between an active region and a conductive layer in a semiconductor device using carbon nanotubes
Abstract
In one embodiment of the present invention, a semiconductor device within an integrated circuit includes an active region associated with a contact structure of the semiconductor device. The semiconductor device also includes a conductive layer providing electrical conductivity between the contact structure of the semiconductor device and one or more other semiconductor devices within the integrated circuit. The semiconductor device also includes a number of carbon nanotubes connected to the active region at first ends of the carbon nanotubes, connected to the conductive layer at second ends of the carbon nanotubes, and extending within a via of the contact structure from the active region to the conductive layer to provide electrical conductivity between the active region and the conductive layer.
Claims
exact text as granted — not AI-modifiedWhat is claimed is:
1 . A semiconductor device within an integrated circuit, comprising:
an active region associated with a contact structure of the semiconductor device; a conductive layer providing electrical conductivity between the contact structure of the semiconductor device and one or more other semiconductor devices within the integrated circuit; and a plurality of carbon nanotubes coupled to the active region at first ends of the carbon nanotubes, coupled to the conductive layer at second ends of the carbon nanotubes, and extending within a via of the contact structure from the active region to the conductive layer to provide electrical conductivity between the active region and the conductive layer.
2 . The device of claim 1 , further comprising a plurality of catalyst nanoparticles deposited on the active region to facilitate growth of the carbon nanotubes during fabrication of the integrated circuit, one or more carbon nanotubes being grown from a corresponding catalyst nanoparticle.
3 . The device of claim 2 , wherein the active region comprises a conductive material deposited on a substrate at the bottom of the via, the catalyst nanoparticles being coupled to the conductive material, the conductive material facilitating formation of the catalyst nanoparticles on the active region during fabrication of the integrated circuit.
4 . The device of claim 3 , wherein:
the conductive layer comprises copper; the catalyst nanoparticles comprise at least one of cobalt and nickel; and the conductive material comprises tungsten.
5 . The device of claim 1 , wherein the carbon nanotubes comprise both single-walled carbon nanotubes and multi-walled carbon nanotubes.
6 . The device of claim 1 , wherein the conductive layer comprises:
a barrier material deposited on a dielectric material surrounding the via; and a conductive material deposited on the barrier material; the barrier material extending into the via and substantially surrounding the second ends of at least some of the carbon nanotubes, the barrier material substantially preventing seepage of the conductive material into the dielectric material.
7 . The system of claim 1 , wherein the semiconductor device comprises a field effect transistor (FET) and the contact structure comprises one of a gate electrode, a source electrode, and a drain electrode of the FET.
8 . The system of claim 1 , wherein the integrated circuit comprises a digital signal processor (DSP).
9 . A method for constructing a semiconductor device in an integrated circuit, comprising:
defining an active region and a via associated with a contact structure of the semiconductor device; growing a plurality of carbon nanotubes on the active region within the via of the contact structure, the carbon nanotubes being coupled to the active region at first ends of the carbon nanotubes; and depositing a conductive layer over the contact structure, the carbon nanotubes being coupled to the conductive layer at second ends of the carbon nanotubes and extending within a via of the contact structure from the active region to the conductive layer to provide electrical conductivity between the active region and the conductive layer, the conductive layer providing electrical conductivity between the contact structure of the semiconductor device and one or more other semiconductor devices within the integrated circuit.
10 . The method of claim 9 , further comprising depositing a plurality of catalyst nanoparticles on the active region to facilitate growth of the carbon nanotubes during fabrication of the integrated circuit, one or more carbon nanotubes growing from a corresponding catalyst nanoparticle.
11 . The method of claim 10 , further comprising depositing a conductive material on a substrate at the bottom of the via, the catalyst nanoparticles being coupled to the conductive material, the conductive material facilitating formation of the catalyst nanoparticles on the active region during fabrication of the integrated circuit.
12 . The device of claim 11 , wherein:
the conductive layer comprises copper; the catalyst nanoparticles comprise at least one of cobalt and nickel; and the conductive material comprises tungsten.
13 . The method of claim 9 , wherein the carbon nanotubes comprise both single-walled carbon nanotubes and multi-walled carbon nanotubes.
14 . The method of claim 9 , wherein depositing the conductive layer comprises:
depositing a barrier material on a dielectric material surrounding the via; and depositing a conductive material on the barrier material, the barrier material extending into the via and substantially surrounding the second ends of at least some of the carbon nanotubes, the barrier material substantially preventing seepage of the conductive material into the dielectric material.
15 . The method of claim 9 , wherein the semiconductor device comprises a field effect transistor (FET) and the contact structure comprises one of a gate electrode, a source electrode, and a drain electrode of the FET.
16 . The method of claim 9 , wherein the integrated circuit comprises a digital signal processor (DSP).
17 . A digital signal processor (DSP) comprising a plurality of contact structures that each comprise:
an active region and an associated via; a conductive layer providing electrical conductivity between the contact structure and one or more other contact structures within the DSP; a plurality of catalyst nanoparticles deposited on the active region to facilitate growth of carbon nanotubes during fabrication of the DSP, one or more carbon nanotubes being grown from a corresponding catalyst nanoparticle; and a plurality of multi-walled and a plurality of single-walled carbon nanotubes coupled to corresponding catalyst nanoparticles at first ends of the carbon nanotubes, coupled to the conductive layer at second ends of the carbon nanotubes, and extending within the via from the active region to the conductive layer to provide electrical conductivity between the active region and the conductive layer.
18 . The DSP of claim 17 , wherein the active region comprises a conductive material deposited on a substrate at the bottom of the via, the catalyst nanoparticles being coupled to the conductive material, the conductive material facilitating formation of the catalyst nanoparticles on the active region during fabrication of the DSP.
19 . The DSP of claim 17 , wherein:
the conductive layer comprises copper; the catalyst nanoparticles comprise at least one of cobalt and nickel; and the conductive material comprises tungsten.
20 . The DSP of claim 17 , wherein the conductive layer comprises:
a barrier material deposited on a dielectric material surrounding the via; and a conductive material deposited on the barrier material; the barrier material extending into the via and substantially surrounding the second ends of at least some of the carbon nanotubes, the barrier material substantially preventing seepage of the conductive material into the dielectric material.Join the waitlist — get patent alerts
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