Circuit substrates, semiconductor packages, and ball grid arrays

Abstract

In one implementation, a circuit substrate includes a substrate having opposing sides. At least one of the sides is configured for transfer mold packaging and has conductive traces formed thereon. A soldermask is received on the one side, and has a plurality of openings formed therethrough to locations on the conductive traces. The soldermask includes a peripheral elongated trench therein positioned on the one side to align with at least a portion of an elongated mold void perimeter of a transfer mold to be used for transfer mold packaging of the one side. In one implementation, the invention includes a transfer mold semiconductor packaging process. In one implementation, the invention includes a semiconductor package. In one implementation, the invention includes a ball grid array.

1 . A transfer mold semiconductor packaging process comprising: 
 providing a circuit substrate having a semiconductor chip mounted to a side thereof, the circuit substrate having a soldermask on the side, the soldermask comprising an elongated outer peripheral trench;    positioning a transfer mold to cover at least a portion of the circuit substrate having the semiconductor chip mounted thereto, the transfer mold having a void within which the semiconductor chip is received, the void having a perimeter, the positioning comprising aligning at least a portion of the void perimeter over at least a portion of the soldermask peripheral trench;    flowing encapsulant into the mold void over the semiconductor chip and to within the soldermask trench; and    after the flowing, curing the encapsulant into a solidified mass.    
     
     
         2 . The process of  claim 1  comprising providing the soldermask elongated outer peripheral trench to be continuous about a periphery.  
     
     
         3 . The process of  claim 1  comprising providing the soldermask elongated outer peripheral trench to be discontinuous about a periphery.  
     
     
         4 . The process of  claim 1  wherein the positioning aligns all of the void perimeter over at least a portion of the soldermask peripheral trench.  
     
     
         5 . The process of  claim 1  wherein the positioning aligns all of the soldermask peripheral trench over at least a portion of the void perimeter.  
     
     
         6 . The process of  claim 1  wherein the positioning aligns all of the void perimeter over all of the soldermask peripheral trench.  
     
     
         7 . The process of  claim 1  comprising providing the soldermask elongated outer peripheral trench to expose the circuit substrate.  
     
     
         8 . The process of  claim 1  wherein the soldermask is received intermediate the semiconductor chip and the circuit substrate.  
     
     
         9 . The process of  claim 1  wherein the positioning positions the mold void perimeter to substantially centrally align with the elongated soldermask trench.  
     
     
         10 . A transfer mold semiconductor packaging process comprising: 
 providing a circuit substrate having a semiconductor chip mounted to a side thereof, the circuit substrate having a soldermask on the side, the soldermask comprising a continuous elongated outer peripheral trench extending therethrough to the circuit substrate;    positioning a transfer mold to cover at least a portion of the circuit substrate having the chip mounted thereto, the transfer mold having a void within which the semiconductor chip is received, the void having a perimeter, the positioning comprising aligning all of the void perimeter over all of the soldermask peripheral trench;    flowing encapsulant into the mold void over the semiconductor chip and to within the soldermask trench; and    after the flowing, curing the encapsulant into a solidified mass.    
     
     
         11 . The process of  claim 10  wherein the positioning positions the mold void perimeter to substantially centrally align with the elongated soldermask trench.  
     
     
         12 . A circuit substrate comprising: 
 a substrate having opposing sides, at least one of the sides being configured for transfer mold packaging and having conductive traces formed thereon; and    a soldermask received on the one side, the soldermask having a plurality of openings formed therethrough to locations on the conductive traces, the soldermask comprising a peripheral elongated trench therein positioned on the one side to align with at least a portion of an elongated mold void perimeter of a transfer mold to be used for transfer mold packaging of the one side.    
     
     
         13 . The substrate of  claim 12  wherein the peripheral elongated trench includes a straight linear segment.  
     
     
         14 . The substrate of  claim 12  wherein the peripheral elongated trench includes a curved linear segment.  
     
     
         15 . The substrate of  claim 12  wherein the peripheral elongated trench is continuous about a periphery.  
     
     
         16 . The substrate of  claim 12  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least four straight linear segments.  
     
     
         17 . The substrate of  claim 12  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least eight straight linear segments.  
     
     
         18 . The substrate of  claim 12  wherein the peripheral elongated trench extends through the soldermask exposing the one substrate side therebeneath.  
     
     
         19 . The substrate of  claim 12  wherein the peripheral elongated trench is positioned on the one side to align with all of the elongated mold void perimeter of the transfer mold to be used for transfer mold packaging of the one side.  
     
     
         20 . The substrate of  claim 12  comprising a semiconductor chip adhered to the one side of the substrate.  
     
     
         21 . The substrate of  claim 12  comprising a semiconductor chip adhered to the one side of the substrate with the soldermask being received between the chip and substrate.  
     
     
         22 . The substrate of  claim 12  comprising an insulative encapsulant received over at least a portion of the soldermask and within the elongated peripheral trench.  
     
     
         23 . The substrate of  claim 12  comprising an insulative encapsulant received over at least a portion of the soldermask and filling the elongated peripheral trench.  
     
     
         24 . A circuit substrate comprising: 
 a substrate having opposing sides, at least one of the sides being configured for transfer mold packaging and having conductive traces formed thereon; and    a soldermask received on the one side, the soldermask having a plurality of openings formed therethrough to locations on the conductive traces, the soldermask comprising a peripheral continuous elongated trench therein extending to the substrate and positioned on the one side to align with all of an elongated mold void perimeter of a transfer mold to be used for transfer mold packaging of the one side.    
     
     
         25 . The substrate of  claim 24  comprising a semiconductor chip adhered to the one side of the substrate.  
     
     
         26 . The substrate of  claim 24  comprising a semiconductor chip adhered to the one side of the substrate with the soldermask being received between the chip and substrate.  
     
     
         27 . The substrate of  claim 24  comprising an insulative encapsulant received over at least a portion of the soldermask and within the elongated peripheral trench.  
     
     
         28 . The substrate of  claim 24  comprising an insulative encapsulant received over at least a portion of the soldermask and filling the elongated peripheral trench.  
     
     
         29 . The substrate of  claim 24  wherein the peripheral elongated trench is positioned on the one side to centrally align with at least a portion of the elongated mold void perimeter of the transfer mold to be used for transfer mold packaging of the one side.  
     
     
         30 . The substrate of  claim 24  wherein the peripheral elongated trench includes a straight linear segment.  
     
     
         31 . The substrate of  claim 24  wherein the peripheral elongated trench includes at least four interconnected straight linear segments.  
     
     
         32 . The substrate of  claim 24  wherein the peripheral elongated trench includes at least eight interconnected straight linear segments.  
     
     
         33 . A semiconductor package comprising: 
 a semiconductor chip;    a circuit substrate having opposing sides, at least one of the opposing sides having conductive traces formed thereon;    a soldermask received on the one side, the soldermask having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one side;    an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted; and    an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter, at least a portion of the encapsulant perimeter being received within the outer peripheral soldermask trench.    
     
     
         34 . The semiconductor package of  claim 33  wherein the peripheral elongated trench includes a straight linear segment.  
     
     
         35 . The semiconductor package of  claim 33  wherein the peripheral elongated trench is continuous about a periphery.  
     
     
         36 . The semiconductor package of  claim 33  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least four straight linear segments.  
     
     
         37 . The semiconductor package of  claim 33  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least eight straight linear segments.  
     
     
         38 . The semiconductor package of  claim 33  wherein the peripheral elongated trench extends through the soldermask to the one substrate side therebeneath.  
     
     
         39 . The semiconductor package of  claim 33  wherein the peripheral elongated trench is continuous about a periphery, and the peripheral elongated trench extends through the soldermask to the one substrate side therebeneath.  
     
     
         40 . The semiconductor package of  claim 33  wherein the soldermask peripheral elongated trench is filled with the insulative encapsulant.  
     
     
         41 . A ball grid array comprising: 
 a semiconductor chip;    a circuit substrate having opposing sides, the opposing sides having respective conductive traces formed thereon;    a soldermask received on each of the opposing sides, the respective soldermasks having openings formed therethrough to locations on the conductive traces, the semiconductor chip being mounted to the one of the opposing sides, a plurality of solder balls respectively mounted through at least some of the soldermask openings to the conductive traces on the other of the opposing sides, ;    an outer peripheral elongated trench formed in the soldermask on the one side radially outward of where the semiconductor chip is mounted; and    an insulative encapsulant being received about the semiconductor chip on the one side, the insulative encapsulant having an outer perimeter, at least a portion of the encapsulant perimeter being received within the outer peripheral soldermask trench.    
     
     
         42 . The ball grid array of  claim 41  wherein the peripheral elongated trench includes a straight linear segment.  
     
     
         43 . The ball grid array of  claim 41  wherein the peripheral elongated trench is continuous about a periphery.  
     
     
         44 . The ball grid array of  claim 41  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least four straight linear segments.  
     
     
         45 . The ball grid array of  claim 41  wherein the peripheral elongated trench is continuous about a periphery, the trench and periphery defining at least eight straight linear segments.  
     
     
         46 . The ball grid array of  claim 41  wherein the peripheral elongated trench extends through the soldermask to the one substrate side therebeneath.  
     
     
         47 . The ball grid array of  claim 41  wherein the peripheral elongated trench is continuous about a periphery, and the peripheral elongated trench extends through the soldermask to the one substrate side therebeneath.  
     
     
         48 . The ball grid array of  claim 41  wherein the soldermask peripheral elongated trench is filled with the insulative encapsulant.