US2003205779A1PendingUtilityA1

Semiconductor device system with impedance matching of control signals

Priority: May 31, 1988Filed: Jun 4, 2003Published: Nov 6, 2003
Est. expiryMay 31, 2008(expired)· nominal 20-yr term from priority
H10D 89/213H10D 89/211H10D 84/212G06F 11/1451H05K 1/0231
39
PatentIndex Score
0
Cited by
0
References
0
Claims

Abstract

A semiconductor device system for coupling with external circuitry. The system includes a control signal on a carrier substrate. A semiconductor device is attached to the carrier substrate with an impedance matching device coupled to the control signal.

Claims

exact text as granted — not AI-modified
What is claimed is:  
     
         1 . A semiconductor device system configured for electrical connection to external circuitry, the semiconductor device system comprising: 
 a carrier substrate;    at least one control signal on the carrier substrate;    at least one semiconductor device secured to the carrier substrate and having at least one control signal input operably coupled to the at least one control signal; and    at least one impedance matching device secured to the carrier substrate and operably coupled to the at least one control signal.    
     
     
         2 . The semiconductor device system of  claim 1  wherein the at least one impedance matching device is a capacitor connected between the at least one control signal and a ground.  
     
     
         3 . The semiconductor device system of  claim 2  wherein the capacitor has a value substantially equal to an input capacitance of the at least one control signal input of the at least one semiconductor device.  
     
     
         4 . The semiconductor device system of  claim 2  wherein the capacitor has a value substantially equal to a total capacitance of the at least one control signal input of more than one of the at least one semiconductor device.  
     
     
         5 . The semiconductor device system of  claim 1  wherein the at least one semiconductor device is a memory device.  
     
     
         6 . The semiconductor device system of  claim 1  wherein the at least one semiconductor device is a dynamic random access memory device.  
     
     
         7 . The semiconductor device system of  claim 6  wherein the at least one control signal input is selected from the group consisting of a multiplexed address bus, a row address strobe, a column address strobe and a write enable signal.  
     
     
         8 . A method of conditioning a control signal on a carrier substrate comprising; securing at least one semiconductor device to the carrier substrate; 
 operably connecting the control signal to a control signal input on the at least one semiconductor device;    selecting an impedance matching device substantially equal to a total impedance of the control signal inputs on one or more of the at least one semiconductor device; and    operably connecting the impedance matching device to the control signal.    
     
     
         9 . The method of  claim 8  wherein the impedance matching device is a capacitor connected between the control signal and a ground.  
     
     
         10 . The method of  claim 8  wherein the at least one semiconductor device is a memory device.  
     
     
         11 . The method of  claim 8  wherein the at least one semiconductor device is a dynamic random access memory device.  
     
     
         12 . The method of  claim 11  wherein the control signal input is selected from the group consisting of a multiplexed address bus, a row address strobe, a column address strobe and a write enable signal.

Join the waitlist — get patent alerts

Track US2003205779A1 — get alerts on status changes and closely related new filings.

We store only your email — no account needed. See our privacy policy.